sim_object.cc (7532:3f6413fc37a2) sim_object.cc (7534:c76a14014c27)
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * Copyright (c) 2010 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Steve Reinhardt
29 * Nathan Binkert
30 */
31
32#include <cassert>
33
34#include "base/callback.hh"
35#include "base/inifile.hh"
36#include "base/match.hh"
37#include "base/misc.hh"
38#include "base/trace.hh"
39#include "base/types.hh"
40#include "sim/sim_object.hh"
41#include "sim/stats.hh"
42
43using namespace std;
44
45
46////////////////////////////////////////////////////////////////////////
47//
48// SimObject member definitions
49//
50////////////////////////////////////////////////////////////////////////
51
52//
53// static list of all SimObjects, used for initialization etc.
54//
55SimObject::SimObjectList SimObject::simObjectList;
56
57//
58// SimObject constructor: used to maintain static simObjectList
59//
60SimObject::SimObject(const Params *p)
61 : EventManager(p->eventq), _params(p)
62{
63#ifdef DEBUG
64 doDebugBreak = false;
65#endif
66
67 simObjectList.push_back(this);
68 state = Running;
69}
70
71void
72SimObject::init()
73{
74}
75
76void
77SimObject::loadState(Checkpoint *cp)
78{
79 if (cp->sectionExists(name()))
80 unserialize(cp, name());
81}
82
83void
84SimObject::initState()
85{
86}
87
88void
89SimObject::startup()
90{
91}
92
93//
94// no default statistics, so nothing to do in base implementation
95//
96void
97SimObject::regStats()
98{
99}
100
101void
102SimObject::regFormulas()
103{
104}
105
106void
107SimObject::resetStats()
108{
109}
110
111//
112// static function: serialize all SimObjects.
113//
114void
115SimObject::serializeAll(ostream &os)
116{
117 SimObjectList::reverse_iterator ri = simObjectList.rbegin();
118 SimObjectList::reverse_iterator rend = simObjectList.rend();
119
120 for (; ri != rend; ++ri) {
121 SimObject *obj = *ri;
122 obj->nameOut(os);
123 obj->serialize(os);
124 }
125}
126
127void
128SimObject::unserializeAll(Checkpoint *cp)
129{
130 SimObjectList::reverse_iterator ri = simObjectList.rbegin();
131 SimObjectList::reverse_iterator rend = simObjectList.rend();
132
133 for (; ri != rend; ++ri) {
134 SimObject *obj = *ri;
135 DPRINTFR(Config, "Unserializing '%s'\n",
136 obj->name());
137 if(cp->sectionExists(obj->name()))
138 obj->unserialize(cp, obj->name());
139 else
140 warn("Not unserializing '%s': no section found in checkpoint.\n",
141 obj->name());
142 }
143}
144
145
146
147#ifdef DEBUG
148//
149// static function: flag which objects should have the debugger break
150//
151void
152SimObject::debugObjectBreak(const string &objs)
153{
154 SimObjectList::const_iterator i = simObjectList.begin();
155 SimObjectList::const_iterator end = simObjectList.end();
156
157 ObjectMatch match(objs);
158 for (; i != end; ++i) {
159 SimObject *obj = *i;
160 obj->doDebugBreak = match.match(obj->name());
161 }
162}
163
164void
165debugObjectBreak(const char *objs)
166{
167 SimObject::debugObjectBreak(string(objs));
168}
169#endif
170
171unsigned int
172SimObject::drain(Event *drain_event)
173{
174 state = Drained;
175 return 0;
176}
177
178void
179SimObject::resume()
180{
181 state = Running;
182}
183
184void
185SimObject::setMemoryMode(State new_mode)
186{
187 panic("setMemoryMode() should only be called on systems");
188}
189
190void
191SimObject::switchOut()
192{
193 panic("Unimplemented!");
194}
195
196void
197SimObject::takeOverFrom(BaseCPU *cpu)
198{
199 panic("Unimplemented!");
200}
201
202
203SimObject *
204SimObject::find(const char *name)
205{
206 SimObjectList::const_iterator i = simObjectList.begin();
207 SimObjectList::const_iterator end = simObjectList.end();
208
209 for (; i != end; ++i) {
210 SimObject *obj = *i;
211 if (obj->name() == name)
212 return obj;
213 }
214
215 return NULL;
216}
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Authors: Steve Reinhardt
30 * Nathan Binkert
31 */
32
33#include <cassert>
34
35#include "base/callback.hh"
36#include "base/inifile.hh"
37#include "base/match.hh"
38#include "base/misc.hh"
39#include "base/trace.hh"
40#include "base/types.hh"
41#include "sim/sim_object.hh"
42#include "sim/stats.hh"
43
44using namespace std;
45
46
47////////////////////////////////////////////////////////////////////////
48//
49// SimObject member definitions
50//
51////////////////////////////////////////////////////////////////////////
52
53//
54// static list of all SimObjects, used for initialization etc.
55//
56SimObject::SimObjectList SimObject::simObjectList;
57
58//
59// SimObject constructor: used to maintain static simObjectList
60//
61SimObject::SimObject(const Params *p)
62 : EventManager(p->eventq), _params(p)
63{
64#ifdef DEBUG
65 doDebugBreak = false;
66#endif
67
68 simObjectList.push_back(this);
69 state = Running;
70}
71
72void
73SimObject::init()
74{
75}
76
77void
78SimObject::loadState(Checkpoint *cp)
79{
80 if (cp->sectionExists(name()))
81 unserialize(cp, name());
82}
83
84void
85SimObject::initState()
86{
87}
88
89void
90SimObject::startup()
91{
92}
93
94//
95// no default statistics, so nothing to do in base implementation
96//
97void
98SimObject::regStats()
99{
100}
101
102void
103SimObject::regFormulas()
104{
105}
106
107void
108SimObject::resetStats()
109{
110}
111
112//
113// static function: serialize all SimObjects.
114//
115void
116SimObject::serializeAll(ostream &os)
117{
118 SimObjectList::reverse_iterator ri = simObjectList.rbegin();
119 SimObjectList::reverse_iterator rend = simObjectList.rend();
120
121 for (; ri != rend; ++ri) {
122 SimObject *obj = *ri;
123 obj->nameOut(os);
124 obj->serialize(os);
125 }
126}
127
128void
129SimObject::unserializeAll(Checkpoint *cp)
130{
131 SimObjectList::reverse_iterator ri = simObjectList.rbegin();
132 SimObjectList::reverse_iterator rend = simObjectList.rend();
133
134 for (; ri != rend; ++ri) {
135 SimObject *obj = *ri;
136 DPRINTFR(Config, "Unserializing '%s'\n",
137 obj->name());
138 if(cp->sectionExists(obj->name()))
139 obj->unserialize(cp, obj->name());
140 else
141 warn("Not unserializing '%s': no section found in checkpoint.\n",
142 obj->name());
143 }
144}
145
146
147
148#ifdef DEBUG
149//
150// static function: flag which objects should have the debugger break
151//
152void
153SimObject::debugObjectBreak(const string &objs)
154{
155 SimObjectList::const_iterator i = simObjectList.begin();
156 SimObjectList::const_iterator end = simObjectList.end();
157
158 ObjectMatch match(objs);
159 for (; i != end; ++i) {
160 SimObject *obj = *i;
161 obj->doDebugBreak = match.match(obj->name());
162 }
163}
164
165void
166debugObjectBreak(const char *objs)
167{
168 SimObject::debugObjectBreak(string(objs));
169}
170#endif
171
172unsigned int
173SimObject::drain(Event *drain_event)
174{
175 state = Drained;
176 return 0;
177}
178
179void
180SimObject::resume()
181{
182 state = Running;
183}
184
185void
186SimObject::setMemoryMode(State new_mode)
187{
188 panic("setMemoryMode() should only be called on systems");
189}
190
191void
192SimObject::switchOut()
193{
194 panic("Unimplemented!");
195}
196
197void
198SimObject::takeOverFrom(BaseCPU *cpu)
199{
200 panic("Unimplemented!");
201}
202
203
204SimObject *
205SimObject::find(const char *name)
206{
207 SimObjectList::const_iterator i = simObjectList.begin();
208 SimObjectList::const_iterator end = simObjectList.end();
209
210 for (; i != end; ++i) {
211 SimObject *obj = *i;
212 if (obj->name() == name)
213 return obj;
214 }
215
216 return NULL;
217}