sim_object.cc (7460:41550bb10e08) sim_object.cc (7492:acc1fbbef239)
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Steve Reinhardt
29 * Nathan Binkert
30 */
31
32#include <cassert>
33
34#include "base/callback.hh"
35#include "base/inifile.hh"
36#include "base/match.hh"
37#include "base/misc.hh"
38#include "base/trace.hh"
39#include "base/types.hh"
40#include "sim/sim_object.hh"
41#include "sim/stats.hh"
42
43using namespace std;
44
45
46////////////////////////////////////////////////////////////////////////
47//
48// SimObject member definitions
49//
50////////////////////////////////////////////////////////////////////////
51
52//
53// static list of all SimObjects, used for initialization etc.
54//
55SimObject::SimObjectList SimObject::simObjectList;
56
57//
58// SimObject constructor: used to maintain static simObjectList
59//
60SimObject::SimObject(const Params *p)
61 : EventManager(p->eventq), _params(p)
62{
63#ifdef DEBUG
64 doDebugBreak = false;
65#endif
66
67 simObjectList.push_back(this);
68 state = Running;
69}
70
71void
72SimObject::init()
73{
74}
75
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Steve Reinhardt
29 * Nathan Binkert
30 */
31
32#include <cassert>
33
34#include "base/callback.hh"
35#include "base/inifile.hh"
36#include "base/match.hh"
37#include "base/misc.hh"
38#include "base/trace.hh"
39#include "base/types.hh"
40#include "sim/sim_object.hh"
41#include "sim/stats.hh"
42
43using namespace std;
44
45
46////////////////////////////////////////////////////////////////////////
47//
48// SimObject member definitions
49//
50////////////////////////////////////////////////////////////////////////
51
52//
53// static list of all SimObjects, used for initialization etc.
54//
55SimObject::SimObjectList SimObject::simObjectList;
56
57//
58// SimObject constructor: used to maintain static simObjectList
59//
60SimObject::SimObject(const Params *p)
61 : EventManager(p->eventq), _params(p)
62{
63#ifdef DEBUG
64 doDebugBreak = false;
65#endif
66
67 simObjectList.push_back(this);
68 state = Running;
69}
70
71void
72SimObject::init()
73{
74}
75
76void
77SimObject::startup()
78{
79}
80
76//
77// no default statistics, so nothing to do in base implementation
78//
79void
80SimObject::regStats()
81{
82}
83
84void
85SimObject::regFormulas()
86{
87}
88
89void
90SimObject::resetStats()
91{
92}
93
94//
95// static function:
96// call regStats() on all SimObjects and then regFormulas() on all
97// SimObjects.
98//
99struct SimObjectResetCB : public Callback
100{
101 virtual void process() { SimObject::resetAllStats(); }
102};
103
104namespace {
105 static SimObjectResetCB StatResetCB;
106}
107
108void
109SimObject::regAllStats()
110{
111 SimObjectList::iterator i;
112 SimObjectList::iterator end = simObjectList.end();
113
114 /**
115 * @todo change cprintfs to DPRINTFs
116 */
117 for (i = simObjectList.begin(); i != end; ++i) {
118#ifdef STAT_DEBUG
119 cprintf("registering stats for %s\n", (*i)->name());
120#endif
121 (*i)->regStats();
122 }
123
124 for (i = simObjectList.begin(); i != end; ++i) {
125#ifdef STAT_DEBUG
126 cprintf("registering formulas for %s\n", (*i)->name());
127#endif
128 (*i)->regFormulas();
129 }
130
131 Stats::registerResetCallback(&StatResetCB);
132}
133
134//
135// static function: call init() on all SimObjects.
136//
137void
138SimObject::initAll()
139{
140 SimObjectList::iterator i = simObjectList.begin();
141 SimObjectList::iterator end = simObjectList.end();
142
143 for (; i != end; ++i) {
144 SimObject *obj = *i;
145 obj->init();
146 }
147}
148
149//
150// static function: call resetStats() on all SimObjects.
151//
152void
153SimObject::resetAllStats()
154{
155 SimObjectList::iterator i = simObjectList.begin();
156 SimObjectList::iterator end = simObjectList.end();
157
158 for (; i != end; ++i) {
159 SimObject *obj = *i;
160 obj->resetStats();
161 }
162}
163
164//
165// static function: serialize all SimObjects.
166//
167void
168SimObject::serializeAll(ostream &os)
169{
170 SimObjectList::reverse_iterator ri = simObjectList.rbegin();
171 SimObjectList::reverse_iterator rend = simObjectList.rend();
172
173 for (; ri != rend; ++ri) {
174 SimObject *obj = *ri;
175 obj->nameOut(os);
176 obj->serialize(os);
177 }
178}
179
180void
181SimObject::unserializeAll(Checkpoint *cp)
182{
183 SimObjectList::reverse_iterator ri = simObjectList.rbegin();
184 SimObjectList::reverse_iterator rend = simObjectList.rend();
185
186 for (; ri != rend; ++ri) {
187 SimObject *obj = *ri;
188 DPRINTFR(Config, "Unserializing '%s'\n",
189 obj->name());
190 if(cp->sectionExists(obj->name()))
191 obj->unserialize(cp, obj->name());
192 else
193 warn("Not unserializing '%s': no section found in checkpoint.\n",
194 obj->name());
195 }
196}
197
81//
82// no default statistics, so nothing to do in base implementation
83//
84void
85SimObject::regStats()
86{
87}
88
89void
90SimObject::regFormulas()
91{
92}
93
94void
95SimObject::resetStats()
96{
97}
98
99//
100// static function:
101// call regStats() on all SimObjects and then regFormulas() on all
102// SimObjects.
103//
104struct SimObjectResetCB : public Callback
105{
106 virtual void process() { SimObject::resetAllStats(); }
107};
108
109namespace {
110 static SimObjectResetCB StatResetCB;
111}
112
113void
114SimObject::regAllStats()
115{
116 SimObjectList::iterator i;
117 SimObjectList::iterator end = simObjectList.end();
118
119 /**
120 * @todo change cprintfs to DPRINTFs
121 */
122 for (i = simObjectList.begin(); i != end; ++i) {
123#ifdef STAT_DEBUG
124 cprintf("registering stats for %s\n", (*i)->name());
125#endif
126 (*i)->regStats();
127 }
128
129 for (i = simObjectList.begin(); i != end; ++i) {
130#ifdef STAT_DEBUG
131 cprintf("registering formulas for %s\n", (*i)->name());
132#endif
133 (*i)->regFormulas();
134 }
135
136 Stats::registerResetCallback(&StatResetCB);
137}
138
139//
140// static function: call init() on all SimObjects.
141//
142void
143SimObject::initAll()
144{
145 SimObjectList::iterator i = simObjectList.begin();
146 SimObjectList::iterator end = simObjectList.end();
147
148 for (; i != end; ++i) {
149 SimObject *obj = *i;
150 obj->init();
151 }
152}
153
154//
155// static function: call resetStats() on all SimObjects.
156//
157void
158SimObject::resetAllStats()
159{
160 SimObjectList::iterator i = simObjectList.begin();
161 SimObjectList::iterator end = simObjectList.end();
162
163 for (; i != end; ++i) {
164 SimObject *obj = *i;
165 obj->resetStats();
166 }
167}
168
169//
170// static function: serialize all SimObjects.
171//
172void
173SimObject::serializeAll(ostream &os)
174{
175 SimObjectList::reverse_iterator ri = simObjectList.rbegin();
176 SimObjectList::reverse_iterator rend = simObjectList.rend();
177
178 for (; ri != rend; ++ri) {
179 SimObject *obj = *ri;
180 obj->nameOut(os);
181 obj->serialize(os);
182 }
183}
184
185void
186SimObject::unserializeAll(Checkpoint *cp)
187{
188 SimObjectList::reverse_iterator ri = simObjectList.rbegin();
189 SimObjectList::reverse_iterator rend = simObjectList.rend();
190
191 for (; ri != rend; ++ri) {
192 SimObject *obj = *ri;
193 DPRINTFR(Config, "Unserializing '%s'\n",
194 obj->name());
195 if(cp->sectionExists(obj->name()))
196 obj->unserialize(cp, obj->name());
197 else
198 warn("Not unserializing '%s': no section found in checkpoint.\n",
199 obj->name());
200 }
201}
202
203
204void
205SimObject::startupAll()
206{
207 SimObjectList::iterator i = simObjectList.begin();
208 SimObjectList::iterator end = simObjectList.end();
209
210 while (i != end) {
211 (*i)->startup();
212 ++i;
213 }
214}
215
216
198#ifdef DEBUG
199//
200// static function: flag which objects should have the debugger break
201//
202void
203SimObject::debugObjectBreak(const string &objs)
204{
205 SimObjectList::const_iterator i = simObjectList.begin();
206 SimObjectList::const_iterator end = simObjectList.end();
207
208 ObjectMatch match(objs);
209 for (; i != end; ++i) {
210 SimObject *obj = *i;
211 obj->doDebugBreak = match.match(obj->name());
212 }
213}
214
215void
216debugObjectBreak(const char *objs)
217{
218 SimObject::debugObjectBreak(string(objs));
219}
220#endif
221
222unsigned int
223SimObject::drain(Event *drain_event)
224{
225 state = Drained;
226 return 0;
227}
228
229void
230SimObject::resume()
231{
232 state = Running;
233}
234
235void
236SimObject::setMemoryMode(State new_mode)
237{
238 panic("setMemoryMode() should only be called on systems");
239}
240
241void
242SimObject::switchOut()
243{
244 panic("Unimplemented!");
245}
246
247void
248SimObject::takeOverFrom(BaseCPU *cpu)
249{
250 panic("Unimplemented!");
251}
252
253
254SimObject *
255SimObject::find(const char *name)
256{
257 SimObjectList::const_iterator i = simObjectList.begin();
258 SimObjectList::const_iterator end = simObjectList.end();
259
260 for (; i != end; ++i) {
261 SimObject *obj = *i;
262 if (obj->name() == name)
263 return obj;
264 }
265
266 return NULL;
267}
217#ifdef DEBUG
218//
219// static function: flag which objects should have the debugger break
220//
221void
222SimObject::debugObjectBreak(const string &objs)
223{
224 SimObjectList::const_iterator i = simObjectList.begin();
225 SimObjectList::const_iterator end = simObjectList.end();
226
227 ObjectMatch match(objs);
228 for (; i != end; ++i) {
229 SimObject *obj = *i;
230 obj->doDebugBreak = match.match(obj->name());
231 }
232}
233
234void
235debugObjectBreak(const char *objs)
236{
237 SimObject::debugObjectBreak(string(objs));
238}
239#endif
240
241unsigned int
242SimObject::drain(Event *drain_event)
243{
244 state = Drained;
245 return 0;
246}
247
248void
249SimObject::resume()
250{
251 state = Running;
252}
253
254void
255SimObject::setMemoryMode(State new_mode)
256{
257 panic("setMemoryMode() should only be called on systems");
258}
259
260void
261SimObject::switchOut()
262{
263 panic("Unimplemented!");
264}
265
266void
267SimObject::takeOverFrom(BaseCPU *cpu)
268{
269 panic("Unimplemented!");
270}
271
272
273SimObject *
274SimObject::find(const char *name)
275{
276 SimObjectList::const_iterator i = simObjectList.begin();
277 SimObjectList::const_iterator end = simObjectList.end();
278
279 for (; i != end; ++i) {
280 SimObject *obj = *i;
281 if (obj->name() == name)
282 return obj;
283 }
284
285 return NULL;
286}