1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Steve Reinhardt 29 * Nathan Binkert 30 */ 31 32#include <assert.h> 33 34#include "base/callback.hh" 35#include "base/inifile.hh" 36#include "base/match.hh" 37#include "base/misc.hh" 38#include "base/trace.hh" 39#include "base/stats/events.hh" 40#include "base/serializer.hh" 41#include "sim/host.hh" 42#include "sim/sim_object.hh" 43#include "sim/stats.hh" 44#include "sim/param.hh" 45 46using namespace std; 47 48 49//////////////////////////////////////////////////////////////////////// 50// 51// SimObject member definitions 52// 53//////////////////////////////////////////////////////////////////////// 54 55// 56// static list of all SimObjects, used for initialization etc. 57// 58SimObject::SimObjectList SimObject::simObjectList; 59 60namespace Stats { 61 extern ObjectMatch event_ignore; 62} 63 64// 65// SimObject constructor: used to maintain static simObjectList 66// 67SimObject::SimObject(Params *p) 68 : _params(p) 69{ 70#ifdef DEBUG 71 doDebugBreak = false; 72#endif 73 74 doRecordEvent = !Stats::event_ignore.match(name()); 75 simObjectList.push_back(this);
| 1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Steve Reinhardt 29 * Nathan Binkert 30 */ 31 32#include <assert.h> 33 34#include "base/callback.hh" 35#include "base/inifile.hh" 36#include "base/match.hh" 37#include "base/misc.hh" 38#include "base/trace.hh" 39#include "base/stats/events.hh" 40#include "base/serializer.hh" 41#include "sim/host.hh" 42#include "sim/sim_object.hh" 43#include "sim/stats.hh" 44#include "sim/param.hh" 45 46using namespace std; 47 48 49//////////////////////////////////////////////////////////////////////// 50// 51// SimObject member definitions 52// 53//////////////////////////////////////////////////////////////////////// 54 55// 56// static list of all SimObjects, used for initialization etc. 57// 58SimObject::SimObjectList SimObject::simObjectList; 59 60namespace Stats { 61 extern ObjectMatch event_ignore; 62} 63 64// 65// SimObject constructor: used to maintain static simObjectList 66// 67SimObject::SimObject(Params *p) 68 : _params(p) 69{ 70#ifdef DEBUG 71 doDebugBreak = false; 72#endif 73 74 doRecordEvent = !Stats::event_ignore.match(name()); 75 simObjectList.push_back(this);
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76 state = Atomic;
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77} 78 79// 80// SimObject constructor: used to maintain static simObjectList 81// 82SimObject::SimObject(const string &_name) 83 : _params(new Params) 84{ 85 _params->name = _name; 86#ifdef DEBUG 87 doDebugBreak = false; 88#endif 89 90 doRecordEvent = !Stats::event_ignore.match(name()); 91 simObjectList.push_back(this);
| 76} 77 78// 79// SimObject constructor: used to maintain static simObjectList 80// 81SimObject::SimObject(const string &_name) 82 : _params(new Params) 83{ 84 _params->name = _name; 85#ifdef DEBUG 86 doDebugBreak = false; 87#endif 88 89 doRecordEvent = !Stats::event_ignore.match(name()); 90 simObjectList.push_back(this);
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92 state = Atomic;
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93} 94 95void 96SimObject::connect() 97{ 98} 99 100void 101SimObject::init() 102{ 103} 104 105// 106// no default statistics, so nothing to do in base implementation 107// 108void 109SimObject::regStats() 110{ 111} 112 113void 114SimObject::regFormulas() 115{ 116} 117 118void 119SimObject::resetStats() 120{ 121} 122 123// 124// static function: 125// call regStats() on all SimObjects and then regFormulas() on all 126// SimObjects. 127// 128struct SimObjectResetCB : public Callback 129{ 130 virtual void process() { SimObject::resetAllStats(); } 131}; 132 133namespace { 134 static SimObjectResetCB StatResetCB; 135} 136 137void 138SimObject::regAllStats() 139{ 140 SimObjectList::iterator i; 141 SimObjectList::iterator end = simObjectList.end(); 142 143 /** 144 * @todo change cprintfs to DPRINTFs 145 */ 146 for (i = simObjectList.begin(); i != end; ++i) { 147#ifdef STAT_DEBUG 148 cprintf("registering stats for %s\n", (*i)->name()); 149#endif 150 (*i)->regStats(); 151 } 152 153 for (i = simObjectList.begin(); i != end; ++i) { 154#ifdef STAT_DEBUG 155 cprintf("registering formulas for %s\n", (*i)->name()); 156#endif 157 (*i)->regFormulas(); 158 } 159 160 Stats::registerResetCallback(&StatResetCB); 161} 162 163// 164// static function: call connect() on all SimObjects. 165// 166void 167SimObject::connectAll() 168{ 169 SimObjectList::iterator i = simObjectList.begin(); 170 SimObjectList::iterator end = simObjectList.end(); 171 172 for (; i != end; ++i) { 173 SimObject *obj = *i; 174 obj->connect(); 175 } 176} 177 178// 179// static function: call init() on all SimObjects. 180// 181void 182SimObject::initAll() 183{ 184 SimObjectList::iterator i = simObjectList.begin(); 185 SimObjectList::iterator end = simObjectList.end(); 186 187 for (; i != end; ++i) { 188 SimObject *obj = *i; 189 obj->init(); 190 } 191} 192 193// 194// static function: call resetStats() on all SimObjects. 195// 196void 197SimObject::resetAllStats() 198{ 199 SimObjectList::iterator i = simObjectList.begin(); 200 SimObjectList::iterator end = simObjectList.end(); 201 202 for (; i != end; ++i) { 203 SimObject *obj = *i; 204 obj->resetStats(); 205 } 206} 207 208// 209// static function: serialize all SimObjects. 210// 211void 212SimObject::serializeAll(ostream &os) 213{ 214 SimObjectList::reverse_iterator ri = simObjectList.rbegin(); 215 SimObjectList::reverse_iterator rend = simObjectList.rend(); 216 217 for (; ri != rend; ++ri) { 218 SimObject *obj = *ri; 219 obj->nameOut(os); 220 obj->serialize(os); 221 } 222} 223
| 91} 92 93void 94SimObject::connect() 95{ 96} 97 98void 99SimObject::init() 100{ 101} 102 103// 104// no default statistics, so nothing to do in base implementation 105// 106void 107SimObject::regStats() 108{ 109} 110 111void 112SimObject::regFormulas() 113{ 114} 115 116void 117SimObject::resetStats() 118{ 119} 120 121// 122// static function: 123// call regStats() on all SimObjects and then regFormulas() on all 124// SimObjects. 125// 126struct SimObjectResetCB : public Callback 127{ 128 virtual void process() { SimObject::resetAllStats(); } 129}; 130 131namespace { 132 static SimObjectResetCB StatResetCB; 133} 134 135void 136SimObject::regAllStats() 137{ 138 SimObjectList::iterator i; 139 SimObjectList::iterator end = simObjectList.end(); 140 141 /** 142 * @todo change cprintfs to DPRINTFs 143 */ 144 for (i = simObjectList.begin(); i != end; ++i) { 145#ifdef STAT_DEBUG 146 cprintf("registering stats for %s\n", (*i)->name()); 147#endif 148 (*i)->regStats(); 149 } 150 151 for (i = simObjectList.begin(); i != end; ++i) { 152#ifdef STAT_DEBUG 153 cprintf("registering formulas for %s\n", (*i)->name()); 154#endif 155 (*i)->regFormulas(); 156 } 157 158 Stats::registerResetCallback(&StatResetCB); 159} 160 161// 162// static function: call connect() on all SimObjects. 163// 164void 165SimObject::connectAll() 166{ 167 SimObjectList::iterator i = simObjectList.begin(); 168 SimObjectList::iterator end = simObjectList.end(); 169 170 for (; i != end; ++i) { 171 SimObject *obj = *i; 172 obj->connect(); 173 } 174} 175 176// 177// static function: call init() on all SimObjects. 178// 179void 180SimObject::initAll() 181{ 182 SimObjectList::iterator i = simObjectList.begin(); 183 SimObjectList::iterator end = simObjectList.end(); 184 185 for (; i != end; ++i) { 186 SimObject *obj = *i; 187 obj->init(); 188 } 189} 190 191// 192// static function: call resetStats() on all SimObjects. 193// 194void 195SimObject::resetAllStats() 196{ 197 SimObjectList::iterator i = simObjectList.begin(); 198 SimObjectList::iterator end = simObjectList.end(); 199 200 for (; i != end; ++i) { 201 SimObject *obj = *i; 202 obj->resetStats(); 203 } 204} 205 206// 207// static function: serialize all SimObjects. 208// 209void 210SimObject::serializeAll(ostream &os) 211{ 212 SimObjectList::reverse_iterator ri = simObjectList.rbegin(); 213 SimObjectList::reverse_iterator rend = simObjectList.rend(); 214 215 for (; ri != rend; ++ri) { 216 SimObject *obj = *ri; 217 obj->nameOut(os); 218 obj->serialize(os); 219 } 220} 221
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224void 225SimObject::unserializeAll(Checkpoint *cp) 226{ 227 SimObjectList::reverse_iterator ri = simObjectList.rbegin(); 228 SimObjectList::reverse_iterator rend = simObjectList.rend(); 229 230 for (; ri != rend; ++ri) { 231 SimObject *obj = *ri; 232 DPRINTFR(Config, "Unserializing '%s'\n", 233 obj->name()); 234 if(cp->sectionExists(obj->name())) 235 obj->unserialize(cp, obj->name()); 236 else 237 warn("Not unserializing '%s': no section found in checkpoint.\n", 238 obj->name()); 239 } 240} 241
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242#ifdef DEBUG 243// 244// static function: flag which objects should have the debugger break 245// 246void 247SimObject::debugObjectBreak(const string &objs) 248{ 249 SimObjectList::const_iterator i = simObjectList.begin(); 250 SimObjectList::const_iterator end = simObjectList.end(); 251 252 ObjectMatch match(objs); 253 for (; i != end; ++i) { 254 SimObject *obj = *i; 255 obj->doDebugBreak = match.match(obj->name()); 256 } 257} 258
| 222#ifdef DEBUG 223// 224// static function: flag which objects should have the debugger break 225// 226void 227SimObject::debugObjectBreak(const string &objs) 228{ 229 SimObjectList::const_iterator i = simObjectList.begin(); 230 SimObjectList::const_iterator end = simObjectList.end(); 231 232 ObjectMatch match(objs); 233 for (; i != end; ++i) { 234 SimObject *obj = *i; 235 obj->doDebugBreak = match.match(obj->name()); 236 } 237} 238
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259extern "C"
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260void 261debugObjectBreak(const char *objs) 262{ 263 SimObject::debugObjectBreak(string(objs)); 264} 265#endif 266 267void 268SimObject::recordEvent(const std::string &stat) 269{ 270 if (doRecordEvent) 271 Stats::recordEvent(stat); 272} 273
| 239void 240debugObjectBreak(const char *objs) 241{ 242 SimObject::debugObjectBreak(string(objs)); 243} 244#endif 245 246void 247SimObject::recordEvent(const std::string &stat) 248{ 249 if (doRecordEvent) 250 Stats::recordEvent(stat); 251} 252
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274bool 275SimObject::quiesce(Event *quiesce_event) 276{ 277 if (state != QuiescedAtomic && state != Atomic) { 278 panic("Must implement your own quiesce function if it is to be used " 279 "in timing mode!"); 280 } 281 state = QuiescedAtomic; 282 return false; 283} 284
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285void
| 253void
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286SimObject::resume()
| 254SimObject::drain(Serializer *serializer)
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287{
| 255{
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288 if (state == QuiescedAtomic) { 289 state = Atomic; 290 } else if (state == QuiescedTiming) { 291 state = Timing; 292 }
| 256 serializer->signalDrained();
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293} 294
| 257} 258
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295void 296SimObject::setMemoryMode(State new_mode) 297{ 298 assert(new_mode == Timing || new_mode == Atomic); 299 if (state == QuiescedAtomic && new_mode == Timing) { 300 state = QuiescedTiming; 301 } else if (state == QuiescedTiming && new_mode == Atomic) { 302 state = QuiescedAtomic; 303 } else { 304 state = new_mode; 305 } 306} 307 308void 309SimObject::switchOut() 310{ 311 panic("Unimplemented!"); 312} 313 314void 315SimObject::takeOverFrom(BaseCPU *cpu) 316{ 317 panic("Unimplemented!"); 318} 319
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320DEFINE_SIM_OBJECT_CLASS_NAME("SimObject", SimObject)
| 259DEFINE_SIM_OBJECT_CLASS_NAME("SimObject", SimObject)
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