root.cc (9983:2cce74fe359e) root.cc (10905:a6ca6831e775)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * Copyright (c) 2011 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Authors: Nathan Binkert
30 * Steve Reinhardt
31 * Gabe Black
32 */
33
34#include "base/misc.hh"
35#include "base/trace.hh"
36#include "config/the_isa.hh"
37#include "debug/TimeSync.hh"
38#include "sim/full_system.hh"
39#include "sim/root.hh"
40
41Root *Root::_root = NULL;
42
43/*
44 * This function is called periodically by an event in M5 and ensures that
45 * at least as much real time has passed between invocations as simulated time.
46 * If not, the function either sleeps, or if the difference is small enough
47 * spin waits.
48 */
49void
50Root::timeSync()
51{
52 Time cur_time, diff, period = timeSyncPeriod();
53
54 do {
55 cur_time.setTimer();
56 diff = cur_time - lastTime;
57 Time remainder = period - diff;
58 if (diff < period && remainder > _spinThreshold) {
59 DPRINTF(TimeSync, "Sleeping to sync with real time.\n");
60 // Sleep until the end of the period, or until a signal.
61 sleep(remainder);
62 // Refresh the current time.
63 cur_time.setTimer();
64 }
65 } while (diff < period);
66 lastTime = cur_time;
67 schedule(&syncEvent, curTick() + _periodTick);
68}
69
70void
71Root::timeSyncEnable(bool en)
72{
73 if (en == _enabled)
74 return;
75 _enabled = en;
76 if (_enabled) {
77 // Get event going.
78 Tick periods = ((curTick() + _periodTick - 1) / _periodTick);
79 Tick nextPeriod = periods * _periodTick;
80 schedule(&syncEvent, nextPeriod);
81 } else {
82 // Stop event.
83 deschedule(&syncEvent);
84 }
85}
86
87/// Configure the period for time sync events.
88void
89Root::timeSyncPeriod(Time newPeriod)
90{
91 bool en = timeSyncEnabled();
92 _period = newPeriod;
93 _periodTick = _period.getTick();
94 timeSyncEnable(en);
95}
96
97/// Set the threshold for time remaining to spin wait.
98void
99Root::timeSyncSpinThreshold(Time newThreshold)
100{
101 bool en = timeSyncEnabled();
102 _spinThreshold = newThreshold;
103 timeSyncEnable(en);
104}
105
106Root::Root(RootParams *p) : SimObject(p), _enabled(false),
107 _periodTick(p->time_sync_period), syncEvent(this)
108{
109 _period.setTick(p->time_sync_period);
110 _spinThreshold.setTick(p->time_sync_spin_threshold);
111
112 assert(_root == NULL);
113 _root = this;
114 lastTime.setTimer();
115
116 simQuantum = p->sim_quantum;
117}
118
119void
120Root::initState()
121{
122 timeSyncEnable(params()->time_sync_enable);
123}
124
125void
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * Copyright (c) 2011 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Authors: Nathan Binkert
30 * Steve Reinhardt
31 * Gabe Black
32 */
33
34#include "base/misc.hh"
35#include "base/trace.hh"
36#include "config/the_isa.hh"
37#include "debug/TimeSync.hh"
38#include "sim/full_system.hh"
39#include "sim/root.hh"
40
41Root *Root::_root = NULL;
42
43/*
44 * This function is called periodically by an event in M5 and ensures that
45 * at least as much real time has passed between invocations as simulated time.
46 * If not, the function either sleeps, or if the difference is small enough
47 * spin waits.
48 */
49void
50Root::timeSync()
51{
52 Time cur_time, diff, period = timeSyncPeriod();
53
54 do {
55 cur_time.setTimer();
56 diff = cur_time - lastTime;
57 Time remainder = period - diff;
58 if (diff < period && remainder > _spinThreshold) {
59 DPRINTF(TimeSync, "Sleeping to sync with real time.\n");
60 // Sleep until the end of the period, or until a signal.
61 sleep(remainder);
62 // Refresh the current time.
63 cur_time.setTimer();
64 }
65 } while (diff < period);
66 lastTime = cur_time;
67 schedule(&syncEvent, curTick() + _periodTick);
68}
69
70void
71Root::timeSyncEnable(bool en)
72{
73 if (en == _enabled)
74 return;
75 _enabled = en;
76 if (_enabled) {
77 // Get event going.
78 Tick periods = ((curTick() + _periodTick - 1) / _periodTick);
79 Tick nextPeriod = periods * _periodTick;
80 schedule(&syncEvent, nextPeriod);
81 } else {
82 // Stop event.
83 deschedule(&syncEvent);
84 }
85}
86
87/// Configure the period for time sync events.
88void
89Root::timeSyncPeriod(Time newPeriod)
90{
91 bool en = timeSyncEnabled();
92 _period = newPeriod;
93 _periodTick = _period.getTick();
94 timeSyncEnable(en);
95}
96
97/// Set the threshold for time remaining to spin wait.
98void
99Root::timeSyncSpinThreshold(Time newThreshold)
100{
101 bool en = timeSyncEnabled();
102 _spinThreshold = newThreshold;
103 timeSyncEnable(en);
104}
105
106Root::Root(RootParams *p) : SimObject(p), _enabled(false),
107 _periodTick(p->time_sync_period), syncEvent(this)
108{
109 _period.setTick(p->time_sync_period);
110 _spinThreshold.setTick(p->time_sync_spin_threshold);
111
112 assert(_root == NULL);
113 _root = this;
114 lastTime.setTimer();
115
116 simQuantum = p->sim_quantum;
117}
118
119void
120Root::initState()
121{
122 timeSyncEnable(params()->time_sync_enable);
123}
124
125void
126Root::loadState(Checkpoint *cp)
126Root::loadState(CheckpointIn &cp)
127{
128 SimObject::loadState(cp);
129 timeSyncEnable(params()->time_sync_enable);
130}
131
132void
127{
128 SimObject::loadState(cp);
129 timeSyncEnable(params()->time_sync_enable);
130}
131
132void
133Root::serialize(std::ostream &os)
133Root::serialize(CheckpointOut &cp) const
134{
135 uint64_t cpt_ver = gem5CheckpointVersion;
136 SERIALIZE_SCALAR(cpt_ver);
137 SERIALIZE_SCALAR(FullSystem);
138 std::string isa = THE_ISA_STR;
139 SERIALIZE_SCALAR(isa);
140}
141
142void
134{
135 uint64_t cpt_ver = gem5CheckpointVersion;
136 SERIALIZE_SCALAR(cpt_ver);
137 SERIALIZE_SCALAR(FullSystem);
138 std::string isa = THE_ISA_STR;
139 SERIALIZE_SCALAR(isa);
140}
141
142void
143Root::unserialize(Checkpoint *cp, const std::string &section)
143Root::unserialize(CheckpointIn &cp)
144{
145 uint64_t cpt_ver = 0;
146 UNSERIALIZE_OPT_SCALAR(cpt_ver);
147 if (cpt_ver < gem5CheckpointVersion) {
148 warn("**********************************************************\n");
149 warn("!!!! Checkpoint ver %#x is older than current ver %#x !!!!\n",
150 cpt_ver, gem5CheckpointVersion);
151 warn("You might experience some issues when restoring and should run "
152 "the checkpoint upgrader (util/cpt_upgrader.py) on your "
153 "checkpoint\n");
154 warn("**********************************************************\n");
155 } else if (cpt_ver > gem5CheckpointVersion) {
156 warn("**********************************************************\n");
157 warn("!!!! Checkpoint ver %#x is newer than current ver %#x !!!!\n",
158 cpt_ver, gem5CheckpointVersion);
159 warn("Running a new checkpoint with an older version of gem5 is not "
160 "supported. While it might work, you may experience incorrect "
161 "behavior or crashes.\n");
162 warn("**********************************************************\n");
163 }
164}
165
166
167bool FullSystem;
168unsigned int FullSystemInt;
169
170Root *
171RootParams::create()
172{
173 static bool created = false;
174 if (created)
175 panic("only one root object allowed!");
176
177 created = true;
178
179 FullSystem = full_system;
180 FullSystemInt = full_system ? 1 : 0;
181
182 return new Root(this);
183}
144{
145 uint64_t cpt_ver = 0;
146 UNSERIALIZE_OPT_SCALAR(cpt_ver);
147 if (cpt_ver < gem5CheckpointVersion) {
148 warn("**********************************************************\n");
149 warn("!!!! Checkpoint ver %#x is older than current ver %#x !!!!\n",
150 cpt_ver, gem5CheckpointVersion);
151 warn("You might experience some issues when restoring and should run "
152 "the checkpoint upgrader (util/cpt_upgrader.py) on your "
153 "checkpoint\n");
154 warn("**********************************************************\n");
155 } else if (cpt_ver > gem5CheckpointVersion) {
156 warn("**********************************************************\n");
157 warn("!!!! Checkpoint ver %#x is newer than current ver %#x !!!!\n",
158 cpt_ver, gem5CheckpointVersion);
159 warn("Running a new checkpoint with an older version of gem5 is not "
160 "supported. While it might work, you may experience incorrect "
161 "behavior or crashes.\n");
162 warn("**********************************************************\n");
163 }
164}
165
166
167bool FullSystem;
168unsigned int FullSystemInt;
169
170Root *
171RootParams::create()
172{
173 static bool created = false;
174 if (created)
175 panic("only one root object allowed!");
176
177 created = true;
178
179 FullSystem = full_system;
180 FullSystemInt = full_system ? 1 : 0;
181
182 return new Root(this);
183}