pseudo_inst.hh (8543:9678812ccb62) pseudo_inst.hh (8555:6fd8d0432d8d)
1/*
2 * Copyright (c) 2003-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 42 unchanged lines hidden (view full) ---

51void quiesceSkip(ThreadContext *tc);
52void quiesceNs(ThreadContext *tc, uint64_t ns);
53void quiesceCycles(ThreadContext *tc, uint64_t cycles);
54uint64_t quiesceTime(ThreadContext *tc);
55uint64_t readfile(ThreadContext *tc, Addr vaddr, uint64_t len,
56 uint64_t offset);
57void loadsymbol(ThreadContext *xc);
58void addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr);
1/*
2 * Copyright (c) 2003-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 42 unchanged lines hidden (view full) ---

51void quiesceSkip(ThreadContext *tc);
52void quiesceNs(ThreadContext *tc, uint64_t ns);
53void quiesceCycles(ThreadContext *tc, uint64_t cycles);
54uint64_t quiesceTime(ThreadContext *tc);
55uint64_t readfile(ThreadContext *tc, Addr vaddr, uint64_t len,
56 uint64_t offset);
57void loadsymbol(ThreadContext *xc);
58void addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr);
59uint64_t initParam(ThreadContext *xc);
59#endif
60
61uint64_t rpns(ThreadContext *tc);
62void wakeCPU(ThreadContext *tc, uint64_t cpuid);
63void m5exit(ThreadContext *tc, Tick delay);
64void resetstats(ThreadContext *tc, Tick delay, Tick period);
65void dumpstats(ThreadContext *tc, Tick delay, Tick period);
66void dumpresetstats(ThreadContext *tc, Tick delay, Tick period);
67void m5checkpoint(ThreadContext *tc, Tick delay, Tick period);
68void debugbreak(ThreadContext *tc);
69void switchcpu(ThreadContext *tc);
70void workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid);
71void workend(ThreadContext *tc, uint64_t workid, uint64_t threadid);
72
73} // namespace PseudoInst
74
75#endif // __SIM_PSEUDO_INST_HH__
60#endif
61
62uint64_t rpns(ThreadContext *tc);
63void wakeCPU(ThreadContext *tc, uint64_t cpuid);
64void m5exit(ThreadContext *tc, Tick delay);
65void resetstats(ThreadContext *tc, Tick delay, Tick period);
66void dumpstats(ThreadContext *tc, Tick delay, Tick period);
67void dumpresetstats(ThreadContext *tc, Tick delay, Tick period);
68void m5checkpoint(ThreadContext *tc, Tick delay, Tick period);
69void debugbreak(ThreadContext *tc);
70void switchcpu(ThreadContext *tc);
71void workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid);
72void workend(ThreadContext *tc, uint64_t workid, uint64_t threadid);
73
74} // namespace PseudoInst
75
76#endif // __SIM_PSEUDO_INST_HH__