1/*
2 * Copyright (c) 2003-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
| 1/*
2 * Copyright (c) 2003-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
27 */
28
29class ExecContext;
30
31//We need the "Tick" data type from here
32#include "sim/host.hh"
33//We need the "Addr" data type from here
34#include "arch/isa_traits.hh"
35
36namespace AlphaPseudo
37{
38 /**
39 * @todo these externs are only here for a hack in fullCPU::takeOver...
40 */
41 extern bool doStatisticsInsts;
42 extern bool doCheckpointInsts;
43 extern bool doQuiesce;
44
45 void arm(ExecContext *xc);
46 void quiesce(ExecContext *xc);
47 void quiesceNs(ExecContext *xc, uint64_t ns);
48 void quiesceCycles(ExecContext *xc, uint64_t cycles);
49 uint64_t quiesceTime(ExecContext *xc);
50 void ivlb(ExecContext *xc);
51 void ivle(ExecContext *xc);
52 void m5exit(ExecContext *xc, Tick delay);
53 void m5exit_old(ExecContext *xc);
54 void resetstats(ExecContext *xc, Tick delay, Tick period);
55 void dumpstats(ExecContext *xc, Tick delay, Tick period);
56 void dumpresetstats(ExecContext *xc, Tick delay, Tick period);
57 void m5checkpoint(ExecContext *xc, Tick delay, Tick period);
58 uint64_t readfile(ExecContext *xc, Addr vaddr, uint64_t len, uint64_t offset);
59 void debugbreak(ExecContext *xc);
60 void switchcpu(ExecContext *xc);
61 void addsymbol(ExecContext *xc, Addr addr, Addr symbolAddr);
62}
| 29 */
30
31class ExecContext;
32
33//We need the "Tick" data type from here
34#include "sim/host.hh"
35//We need the "Addr" data type from here
36#include "arch/isa_traits.hh"
37
38namespace AlphaPseudo
39{
40 /**
41 * @todo these externs are only here for a hack in fullCPU::takeOver...
42 */
43 extern bool doStatisticsInsts;
44 extern bool doCheckpointInsts;
45 extern bool doQuiesce;
46
47 void arm(ExecContext *xc);
48 void quiesce(ExecContext *xc);
49 void quiesceNs(ExecContext *xc, uint64_t ns);
50 void quiesceCycles(ExecContext *xc, uint64_t cycles);
51 uint64_t quiesceTime(ExecContext *xc);
52 void ivlb(ExecContext *xc);
53 void ivle(ExecContext *xc);
54 void m5exit(ExecContext *xc, Tick delay);
55 void m5exit_old(ExecContext *xc);
56 void resetstats(ExecContext *xc, Tick delay, Tick period);
57 void dumpstats(ExecContext *xc, Tick delay, Tick period);
58 void dumpresetstats(ExecContext *xc, Tick delay, Tick period);
59 void m5checkpoint(ExecContext *xc, Tick delay, Tick period);
60 uint64_t readfile(ExecContext *xc, Addr vaddr, uint64_t len, uint64_t offset);
61 void debugbreak(ExecContext *xc);
62 void switchcpu(ExecContext *xc);
63 void addsymbol(ExecContext *xc, Addr addr, Addr symbolAddr);
64}
|