process.hh (11140:cf07f8bf58db) process.hh (11168:f98eb2da15a4)
1/*
2 * Copyright (c) 2014 Advanced Micro Devices, Inc.
3 * Copyright (c) 2001-2005 The Regents of The University of Michigan
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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117 Stats::Scalar num_syscalls; // number of syscalls executed
118
119 protected:
120 // constructor
121 Process(ProcessParams *params);
122
123 virtual void initState();
124
1/*
2 * Copyright (c) 2014 Advanced Micro Devices, Inc.
3 * Copyright (c) 2001-2005 The Regents of The University of Michigan
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

--- 108 unchanged lines hidden (view full) ---

117 Stats::Scalar num_syscalls; // number of syscalls executed
118
119 protected:
120 // constructor
121 Process(ProcessParams *params);
122
123 virtual void initState();
124
125 DrainState drain() M5_ATTR_OVERRIDE;
125 DrainState drain() override;
126
127 public:
128
129 //This id is assigned by m5 and is used to keep process' tlb entries
130 //separated.
131 uint64_t M5_pid;
132
133 // flag for using architecture specific page table

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218 * @param paddr The starting physical address of the range.
219 * @param size The length of the range in bytes.
220 * @param cacheable Specifies whether accesses are cacheable.
221 * @return True if the map operation was successful. (At this
222 * point in time, the map operation always succeeds.)
223 */
224 bool map(Addr vaddr, Addr paddr, int size, bool cacheable = true);
225
126
127 public:
128
129 //This id is assigned by m5 and is used to keep process' tlb entries
130 //separated.
131 uint64_t M5_pid;
132
133 // flag for using architecture specific page table

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218 * @param paddr The starting physical address of the range.
219 * @param size The length of the range in bytes.
220 * @param cacheable Specifies whether accesses are cacheable.
221 * @return True if the map operation was successful. (At this
222 * point in time, the map operation always succeeds.)
223 */
224 bool map(Addr vaddr, Addr paddr, int size, bool cacheable = true);
225
226 void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
227 void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
226 void serialize(CheckpointOut &cp) const override;
227 void unserialize(CheckpointIn &cp) override;
228};
229
230//
231// "Live" process with system calls redirected to host system
232//
233class ObjectFile;
234class LiveProcess : public Process
235{

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229
230//
231// "Live" process with system calls redirected to host system
232//
233class ObjectFile;
234class LiveProcess : public Process
235{

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