1/*
2 * Copyright (c) 2017 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Author: Brandon Potter
29 */
30
31#ifndef SRC_SIM_MEM_STATE_HH
32#define SRC_SIM_MEM_STATE_HH
33
| 1/*
2 * Copyright (c) 2017 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Author: Brandon Potter
29 */
30
31#ifndef SRC_SIM_MEM_STATE_HH
32#define SRC_SIM_MEM_STATE_HH
33
|
| 34#include "sim/serialize.hh"
35
|
34/**
35 * This class holds the memory state for the Process class and all of its
36 * derived, architecture-specific children.
37 *
38 * The fields held in this class dynamically change as the process object
39 * is run in the simulator. They are updated by system calls and faults;
40 * each change represents a modification to the process address space.
41 * The stack, heap, and mmap boundaries are held with this class along with
42 * the base of the next thread stack.
43 *
44 * The class is meant to be allocated dynamically and shared through a
45 * pointer interface because two process can potentially share their virtual
46 * address space if certain options are passed into the clone(2).
47 */
| 36/**
37 * This class holds the memory state for the Process class and all of its
38 * derived, architecture-specific children.
39 *
40 * The fields held in this class dynamically change as the process object
41 * is run in the simulator. They are updated by system calls and faults;
42 * each change represents a modification to the process address space.
43 * The stack, heap, and mmap boundaries are held with this class along with
44 * the base of the next thread stack.
45 *
46 * The class is meant to be allocated dynamically and shared through a
47 * pointer interface because two process can potentially share their virtual
48 * address space if certain options are passed into the clone(2).
49 */
|
48class MemState
| 50class MemState : public Serializable
|
49{
50 public:
51 MemState(Addr brk_point, Addr stack_base, Addr max_stack_size,
52 Addr next_thread_stack_base, Addr mmap_end)
53 : _brkPoint(brk_point), _stackBase(stack_base), _stackSize(0),
54 _maxStackSize(max_stack_size), _stackMin(0),
55 _nextThreadStackBase(next_thread_stack_base), _mmapEnd(mmap_end)
56 { }
57
58 MemState&
59 operator=(const MemState &in)
60 {
61 if (this == &in)
62 return *this;
63
64 _brkPoint = in._brkPoint;
65 _stackBase = in._stackBase;
66 _stackSize = in._stackSize;
67 _maxStackSize = in._maxStackSize;
68 _stackMin = in._stackMin;
69 _nextThreadStackBase = in._nextThreadStackBase;
70 _mmapEnd = in._mmapEnd;
71 return *this;
72 }
73
74 Addr getBrkPoint() const { return _brkPoint; }
75 Addr getStackBase() const { return _stackBase; }
76 Addr getStackSize() const { return _stackSize; }
77 Addr getMaxStackSize() const { return _maxStackSize; }
78 Addr getStackMin() const { return _stackMin; }
79 Addr getNextThreadStackBase() const { return _nextThreadStackBase; }
80 Addr getMmapEnd() const { return _mmapEnd; }
81
82 void setBrkPoint(Addr brk_point) { _brkPoint = brk_point; }
83 void setStackBase(Addr stack_base) { _stackBase = stack_base; }
84 void setStackSize(Addr stack_size) { _stackSize = stack_size; }
85 void setMaxStackSize(Addr max_stack) { _maxStackSize = max_stack; }
86 void setStackMin(Addr stack_min) { _stackMin = stack_min; }
87 void setNextThreadStackBase(Addr ntsb) { _nextThreadStackBase = ntsb; }
88 void setMmapEnd(Addr mmap_end) { _mmapEnd = mmap_end; }
89
| 51{
52 public:
53 MemState(Addr brk_point, Addr stack_base, Addr max_stack_size,
54 Addr next_thread_stack_base, Addr mmap_end)
55 : _brkPoint(brk_point), _stackBase(stack_base), _stackSize(0),
56 _maxStackSize(max_stack_size), _stackMin(0),
57 _nextThreadStackBase(next_thread_stack_base), _mmapEnd(mmap_end)
58 { }
59
60 MemState&
61 operator=(const MemState &in)
62 {
63 if (this == &in)
64 return *this;
65
66 _brkPoint = in._brkPoint;
67 _stackBase = in._stackBase;
68 _stackSize = in._stackSize;
69 _maxStackSize = in._maxStackSize;
70 _stackMin = in._stackMin;
71 _nextThreadStackBase = in._nextThreadStackBase;
72 _mmapEnd = in._mmapEnd;
73 return *this;
74 }
75
76 Addr getBrkPoint() const { return _brkPoint; }
77 Addr getStackBase() const { return _stackBase; }
78 Addr getStackSize() const { return _stackSize; }
79 Addr getMaxStackSize() const { return _maxStackSize; }
80 Addr getStackMin() const { return _stackMin; }
81 Addr getNextThreadStackBase() const { return _nextThreadStackBase; }
82 Addr getMmapEnd() const { return _mmapEnd; }
83
84 void setBrkPoint(Addr brk_point) { _brkPoint = brk_point; }
85 void setStackBase(Addr stack_base) { _stackBase = stack_base; }
86 void setStackSize(Addr stack_size) { _stackSize = stack_size; }
87 void setMaxStackSize(Addr max_stack) { _maxStackSize = max_stack; }
88 void setStackMin(Addr stack_min) { _stackMin = stack_min; }
89 void setNextThreadStackBase(Addr ntsb) { _nextThreadStackBase = ntsb; }
90 void setMmapEnd(Addr mmap_end) { _mmapEnd = mmap_end; }
91
|
| 92 void
93 serialize(CheckpointOut &cp) const override
94 {
95 paramOut(cp, "brkPoint", _brkPoint);
96 paramOut(cp, "stackBase", _stackBase);
97 paramOut(cp, "stackSize", _stackSize);
98 paramOut(cp, "maxStackSize", _maxStackSize);
99 paramOut(cp, "stackMin", _stackMin);
100 paramOut(cp, "nextThreadStackBase", _nextThreadStackBase);
101 paramOut(cp, "mmapEnd", _mmapEnd);
102 }
103 void
104 unserialize(CheckpointIn &cp) override
105 {
106 paramIn(cp, "brkPoint", _brkPoint);
107 paramIn(cp, "stackBase", _stackBase);
108 paramIn(cp, "stackSize", _stackSize);
109 paramIn(cp, "maxStackSize", _maxStackSize);
110 paramIn(cp, "stackMin", _stackMin);
111 paramIn(cp, "nextThreadStackBase", _nextThreadStackBase);
112 paramIn(cp, "mmapEnd", _mmapEnd);
113 }
114
|
90 private:
91 Addr _brkPoint;
92 Addr _stackBase;
93 Addr _stackSize;
94 Addr _maxStackSize;
95 Addr _stackMin;
96 Addr _nextThreadStackBase;
97 Addr _mmapEnd;
98};
99
100#endif
| 115 private:
116 Addr _brkPoint;
117 Addr _stackBase;
118 Addr _stackSize;
119 Addr _maxStackSize;
120 Addr _stackMin;
121 Addr _nextThreadStackBase;
122 Addr _mmapEnd;
123};
124
125#endif
|