1/*
2 * Copyright (c) 2000-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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61#include "mem/port.hh"
62#include "sim/async.hh"
63#include "sim/builder.hh"
64#include "sim/host.hh"
65#include "sim/serialize.hh"
66#include "sim/sim_events.hh"
67#include "sim/sim_exit.hh"
68#include "sim/sim_object.hh"
69#include "sim/stat_control.hh"
70#include "sim/stats.hh"
71#include "sim/root.hh"
72
73using namespace std;
74
75// See async.h.
76volatile bool async_event = false;

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435{
436 BaseCPU *ptr = dynamic_cast<BaseCPU *>(obj);
437
438 if (ptr == NULL)
439 warn("Casting to BaseCPU pointer failed");
440 return ptr;
441}
442
443/**
444 * Do C++ simulator exit processing. Exported to SWIG to be invoked
445 * when simulator terminates via Python's atexit mechanism.
446 */
447void
448doExitCleanup()
449{
450 exitCallbacks().process();
451 exitCallbacks().clear();
452
453 cout.flush();
454
455 ParamContext::cleanupAllContexts();
456
457 // print simulation stats
458 Stats::DumpNow();
459}