1/*
2 * Copyright (c) 2014 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
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40 * Authors: Steve Reinhardt
41 * Nathan Binkert
42 */
43
44#ifndef __INSTRECORD_HH__
45#define __INSTRECORD_HH__
46
47#include "base/bigint.hh"
48#include "base/types.hh"
49#include "cpu/inst_seq.hh"
50#include "cpu/static_inst.hh"
51#include "sim/sim_object.hh"
52
53class ThreadContext;
54
55namespace Trace {
56
57class InstRecord
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2 * Copyright (c) 2014 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
--- 31 unchanged lines hidden (view full) ---
40 * Authors: Steve Reinhardt
41 * Nathan Binkert
42 */
43
44#ifndef __INSTRECORD_HH__
45#define __INSTRECORD_HH__
46
47#include "base/bigint.hh"
48#include "base/types.hh"
49#include "cpu/inst_seq.hh"
50#include "cpu/static_inst.hh"
51#include "sim/sim_object.hh"
52
53class ThreadContext;
54
55namespace Trace {
56
57class InstRecord
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