System.py (9313:0ad73254027b) System.py (9338:97b4a2be1e5b)
1# Copyright (c) 2005-2007 The Regents of The University of Michigan
2# Copyright (c) 2011 Regents of the University of California
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions are
7# met: redistributions of source code must retain the above copyright
8# notice, this list of conditions and the following disclaimer;

--- 25 unchanged lines hidden (view full) ---

34from m5.proxy import *
35
36from SimpleMemory import *
37
38class MemoryMode(Enum): vals = ['invalid', 'atomic', 'timing']
39
40class System(MemObject):
41 type = 'System'
1# Copyright (c) 2005-2007 The Regents of The University of Michigan
2# Copyright (c) 2011 Regents of the University of California
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions are
7# met: redistributions of source code must retain the above copyright
8# notice, this list of conditions and the following disclaimer;

--- 25 unchanged lines hidden (view full) ---

34from m5.proxy import *
35
36from SimpleMemory import *
37
38class MemoryMode(Enum): vals = ['invalid', 'atomic', 'timing']
39
40class System(MemObject):
41 type = 'System'
42 cxx_header = "sim/system.hh"
42 system_port = MasterPort("System port")
43
44 # Override the clock from the ClockedObject which looks at the
45 # parent clock by default. The 1 GHz default system clock serves
46 # as a start for the modules that rely on the parent to provide
47 # the clock.
48 clock = '1GHz'
49

--- 36 unchanged lines hidden --- 		43 system_port = MasterPort("System port")
44
45 # Override the clock from the ClockedObject which looks at the
46 # parent clock by default. The 1 GHz default system clock serves
47 # as a start for the modules that rely on the parent to provide
48 # the clock.
49 clock = '1GHz'
50

--- 36 unchanged lines hidden ---