System.py (13883:f44e21d3aaa7) | System.py (13892:0182a0601f66) |
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1# Copyright (c) 2017 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 37 unchanged lines hidden (view full) --- 46from m5.proxy import * 47 48from m5.objects.DVFSHandler import * 49from m5.objects.SimpleMemory import * 50 51class MemoryMode(Enum): vals = ['invalid', 'atomic', 'timing', 52 'atomic_noncaching'] 53 | 1# Copyright (c) 2017 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 37 unchanged lines hidden (view full) --- 46from m5.proxy import * 47 48from m5.objects.DVFSHandler import * 49from m5.objects.SimpleMemory import * 50 51class MemoryMode(Enum): vals = ['invalid', 'atomic', 'timing', 52 'atomic_noncaching'] 53 |
54class System(MemObject): | 54class System(SimObject): |
55 type = 'System' 56 cxx_header = "sim/system.hh" 57 system_port = MasterPort("System port") 58 59 cxx_exports = [ 60 PyBindMethod("getMemoryMode"), 61 PyBindMethod("setMemoryMode"), 62 ] --- 65 unchanged lines hidden --- | 55 type = 'System' 56 cxx_header = "sim/system.hh" 57 system_port = MasterPort("System port") 58 59 cxx_exports = [ 60 PyBindMethod("getMemoryMode"), 61 PyBindMethod("setMemoryMode"), 62 ] --- 65 unchanged lines hidden --- |