ClockDomain.py (9793:6e6cefc1db1f) | ClockDomain.py (9827:f47274776aa0) |
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1# Copyright (c) 2013 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 24 unchanged lines hidden (view full) --- 33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35# 36# Authors: Vasileios Spiliopoulos 37# Akash Bagdia 38 39from m5.params import * 40from m5.SimObject import SimObject | 1# Copyright (c) 2013 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 24 unchanged lines hidden (view full) --- 33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35# 36# Authors: Vasileios Spiliopoulos 37# Akash Bagdia 38 39from m5.params import * 40from m5.SimObject import SimObject |
41from m5.proxy import * |
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41 42# Abstract clock domain 43class ClockDomain(SimObject): 44 type = 'ClockDomain' 45 cxx_header = "sim/clock_domain.hh" 46 abstract = True 47 48# Source clock domain with an actual clock 49class SrcClockDomain(ClockDomain): 50 type = 'SrcClockDomain' 51 cxx_header = "sim/clock_domain.hh" 52 clock = Param.Clock("Clock period") 53 | 42 43# Abstract clock domain 44class ClockDomain(SimObject): 45 type = 'ClockDomain' 46 cxx_header = "sim/clock_domain.hh" 47 abstract = True 48 49# Source clock domain with an actual clock 50class SrcClockDomain(ClockDomain): 51 type = 'SrcClockDomain' 52 cxx_header = "sim/clock_domain.hh" 53 clock = Param.Clock("Clock period") 54 |
55 # A source clock must be associated with a voltage domain 56 voltage_domain = Param.VoltageDomain("Voltage domain") 57 |
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54# Derived clock domain with a parent clock domain and a frequency 55# divider 56class DerivedClockDomain(ClockDomain): 57 type = 'DerivedClockDomain' 58 cxx_header = "sim/clock_domain.hh" 59 clk_domain = Param.ClockDomain("Parent clock domain") 60 clk_divider = Param.Unsigned(1, "Frequency divider") | 58# Derived clock domain with a parent clock domain and a frequency 59# divider 60class DerivedClockDomain(ClockDomain): 61 type = 'DerivedClockDomain' 62 cxx_header = "sim/clock_domain.hh" 63 clk_domain = Param.ClockDomain("Parent clock domain") 64 clk_divider = Param.Unsigned(1, "Frequency divider") |