1# Copyright (c) 2012 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated

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36# Authors: Andreas Hansson
37# Uri Wiener
38
39#####################################################################
40#
41# System visualization using DOT
42#
43# While config.ini and config.json provide an almost complete listing
44# of a system's components and connectivity, they lack a birds-eye view.
45# The output generated by do_dot() is a DOT-based figure (pdf) and its
46# source dot code. Nodes are components, and edges represent
47# the memory hierarchy: the edges are directed, from a master to a slave.
48# Initially all nodes are generated, and then all edges are added.
49# do_dot should be called with the top-most SimObject (namely root
50# but not necessarily), the output folder and the output dot source
51# filename. From the given node, both processes (node and edge creation)
52# is performed recursivly, traversing all children of the given root.
53#
54# pydot is required. When missing, no output will be generated.
55#
56#####################################################################
57
58import m5, os, re
59from m5.SimObject import isRoot, isSimObjectVector
60from m5.util import warn

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65
66# need to create all nodes (components) before creating edges (memory channels)
67def dot_create_nodes(simNode, callgraph):
68 if isRoot(simNode):
69 label = "root"
70 else:
71 label = simNode._name
72 full_path = re.sub('\.', '_', simNode.path())
73
74 # each component is a sub-graph (cluster)
75 cluster = dot_create_cluster(simNode, full_path, label)
76
77 # create nodes per port
78 for port_name in simNode._ports.keys():
79 port = simNode._port_refs.get(port_name, None)
80 if port != None:

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150 color = "#000000", \
151 fillcolor = "#808080", \
152 fontname = "Arial", \
153 fontsize = "14", \
154 fontcolor = "#000000" \
155 )
156
157# generate color for nodes
158# currently a simple grayscale. placeholder for aesthetic programmers.
159def dot_gen_color(simNode):
160 depth = len(simNode.path().split('.'))
161 depth = 256 - depth * 16 * 3
162 return dot_rgb_to_html(simNode, depth, depth, depth)
163
164def dot_rgb_to_html(simNode, r, g, b):
165 return "#%.2x%.2x%.2x" % (r, g, b)
166
167def do_dot(root, outdir, dotFilename):
168 if not pydot:
169 return
170 callgraph = pydot.Dot(graph_type='digraph')
171 dot_create_nodes(root, callgraph)
172 dot_create_edges(root, callgraph)
173 dot_filename = os.path.join(outdir, dotFilename)
174 callgraph.write(dot_filename)
175 try:
176 # dot crashes if the figure is extremely wide.
177 # So avoid terminating simulation unnecessarily
178 callgraph.write_pdf(dot_filename + ".pdf")
179 except:
180 warn("failed to generate pdf output from %s", dot_filename)