1# Copyright (c) 2004-2006 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 816 unchanged lines hidden (view full) --- 825 raise 826 self.connect(realPeer) 827 828 # Call C++ to create corresponding port connection between C++ objects 829 def ccConnect(self): 830 if self.ccConnected: # already done this 831 return 832 peer = self.peer |
833 internal.main.connectPorts(self.simobj.getCCObject(), self.name, 834 self.index, peer.simobj.getCCObject(), 835 peer.name, peer.index) |
836 self.ccConnected = True 837 peer.ccConnected = True 838 839# A reference to an individual element of a VectorPort... much like a 840# PortRef, but has an index. 841class VectorPortElementRef(PortRef): 842 def __init__(self, simobj, name, index): 843 PortRef.__init__(self, simobj, name) --- 122 unchanged lines hidden (view full) --- 966 'MaxAddr', 'MaxTick', 'AllMemory', 967 'NextEthernetAddr', 'NULL', 968 'Port', 'VectorPort'] 969 970# see comment on imports at end of __init__.py. 971from SimObject import isSimObject, isSimObjectSequence, isSimObjectClass 972import proxy 973import objects |
974import internal |