164c164
< cls._port_map = multidict() # port bindings
---
> cls._port_refs = multidict() # port ref objects
182c182
< cls._port_map.parent = base._port_map
---
> cls._port_refs.parent = base._port_refs
200c200
< cls._ports[key] = val
---
> cls._new_port(key, val)
230c230
< setattr(cls, name, pdesc.default)
---
> cls._set_param(name, pdesc.default, pdesc)
231a232,260
> def _set_param(cls, name, value, param):
> assert(param.name == name)
> try:
> cls._values[name] = param.convert(value)
> except Exception, e:
> msg = "%s\nError setting param %s.%s to %s\n" % \
> (e, cls.__name__, name, value)
> e.args = (msg, )
> raise
>
> def _new_port(cls, name, port):
> # each port should be uniquely assigned to one variable
> assert(not hasattr(port, 'name'))
> port.name = name
> cls._ports[name] = port
> if hasattr(port, 'default'):
> cls._cls_get_port_ref(name).connect(port.default)
>
> # same as _get_port_ref, effectively, but for classes
> def _cls_get_port_ref(cls, attr):
> # Return reference that can be assigned to another port
> # via __setattr__. There is only ever one reference
> # object per port, but we create them lazily here.
> ref = cls._port_refs.get(attr)
> if not ref:
> ref = cls._ports[attr].makeRef(cls)
> cls._port_refs[attr] = ref
> return ref
>
245c274
< self._ports[attr].connect(self, attr, value)
---
> cls._cls_get_port_ref(attr).connect(value)
255c284
< param = cls._params.get(attr, None)
---
> param = cls._params.get(attr)
257,265c286,294
< try:
< cls._values[attr] = param.convert(value)
< except Exception, e:
< msg = "%s\nError setting param %s.%s to %s\n" % \
< (e, cls.__name__, attr, value)
< e.args = (msg, )
< raise
< elif isSimObjectOrSequence(value):
< # if RHS is a SimObject, it's an implicit child assignment
---
> cls._set_param(attr, value, param)
> return
>
> if isSimObjectOrSequence(value):
> # If RHS is a SimObject, it's an implicit child assignment.
> # Classes don't have children, so we just put this object
> # in _values; later, each instance will do a 'setattr(self,
> # attr, _values[attr])' in SimObject.__init__ which will
> # add this object as a child.
267,269c296
< else:
< raise AttributeError, \
< "Class %s has no parameter \'%s\'" % (cls.__name__, attr)
---
> return
270a298,301
> # no valid assignment... raise exception
> raise AttributeError, \
> "Class %s has no parameter \'%s\'" % (cls.__name__, attr)
>
425,427c456,458
< self._port_map = {}
< for key,val in ancestor._port_map.iteritems():
< self._port_map[key] = applyOrMap(val, 'clone', memo_dict)
---
> self._port_refs = {}
> for key,val in ancestor._port_refs.iteritems():
> self._port_refs[key] = val.clone(self, memo_dict)
453a485,494
> def _get_port_ref(self, attr):
> # Return reference that can be assigned to another port
> # via __setattr__. There is only ever one reference
> # object per port, but we create them lazily here.
> ref = self._port_refs.get(attr)
> if not ref:
> ref = self._ports[attr].makeRef(self)
> self._port_refs[attr] = ref
> return ref
>
456,458c497
< # return reference that can be assigned to another port
< # via __setattr__
< return self._ports[attr].makeRef(self, attr)
---
> return self._get_port_ref(attr)
476c515
< self._ports[attr].connect(self, attr, value)
---
> self._get_port_ref(attr).connect(value)
485c524
< param = self._params.get(attr, None)
---
> param = self._params.get(attr)
494,498c533,534
< elif isSimObjectOrSequence(value):
< pass
< else:
< raise AttributeError, "Class %s has no parameter %s" \
< % (self.__class__.__name__, attr)
---
> self._set_child(attr, value)
> return
500,501c536,538
< # clear out old child with this name, if any
< self.clear_child(attr)
---
> if isSimObjectOrSequence(value):
> self._set_child(attr, value)
> return
503,507c540,542
< if isSimObject(value):
< value.set_path(self, attr)
< elif isSimObjectSequence(value):
< value = SimObjVector(value)
< [v.set_path(self, "%s%d" % (attr, i)) for i,v in enumerate(value)]
---
> # no valid assignment... raise exception
> raise AttributeError, "Class %s has no parameter %s" \
> % (self.__class__.__name__, attr)
509d543
< self._values[attr] = value
531c565
< def set_path(self, parent, name):
---
> def _maybe_set_parent(self, parent, name):
536a571,584
> def _set_child(self, attr, value):
> # if RHS is a SimObject, it's an implicit child assignment
> # clear out old child with this name, if any
> self.clear_child(attr)
>
> if isSimObject(value):
> value._maybe_set_parent(self, attr)
> elif isSimObjectSequence(value):
> value = SimObjVector(value)
> [v._maybe_set_parent(self, "%s%d" % (attr, i))
> for i,v in enumerate(value)]
>
> self._values[attr] = value
>
575a624,643
> def unproxy_all(self):
> for param in self._params.iterkeys():
> value = self._values.get(param)
> if value != None and proxy.isproxy(value):
> try:
> value = value.unproxy(self)
> except:
> print "Error in unproxying param '%s' of %s" % \
> (param, self.path())
> raise
> setattr(self, param, value)
>
> for port_name in self._ports.iterkeys():
> port = self._port_refs.get(port_name)
> if port != None:
> port.unproxy(self)
>
> for child in self._children.itervalues():
> child.unproxy_all()
>
594c662
< value = self._values.get(param, None)
---
> value = self._values.get(param)
596,604d663
< if proxy.isproxy(value):
< try:
< value = value.unproxy(self)
< except:
< print >> sys.stderr, \
< "Error in unproxying param '%s' of %s" % \
< (param, self.path())
< raise
< setattr(self, param, value)
610,619c669,671
< port = self._port_map.get(port_name, None)
< if port == None:
< default = getattr(self._ports[port_name], 'default', None)
< if default == None:
< # port is unbound... that's OK, go to next port
< continue
< else:
< print port_name, default
< port = m5.makeList(port) # make list even if it's a scalar port
< print '%s=%s' % (port_name, ' '.join([str(p) for p in port]))
---
> port = self._port_refs.get(port_name, None)
> if port != None:
> print '%s=%s' % (port_name, port.ini_str())
646c698
< # _port_map (& recursively for all children)
---
> # _port_refs (& recursively for all children)
648,649c700,701
< for portRef in self._port_map.itervalues():
< applyOrMap(portRef, 'ccConnect')
---
> for portRef in self._port_refs.itervalues():
> portRef.ccConnect()
< cls._port_map = multidict() # port bindings
---
> cls._port_refs = multidict() # port ref objects
182c182
< cls._port_map.parent = base._port_map
---
> cls._port_refs.parent = base._port_refs
200c200
< cls._ports[key] = val
---
> cls._new_port(key, val)
230c230
< setattr(cls, name, pdesc.default)
---
> cls._set_param(name, pdesc.default, pdesc)
231a232,260
> def _set_param(cls, name, value, param):
> assert(param.name == name)
> try:
> cls._values[name] = param.convert(value)
> except Exception, e:
> msg = "%s\nError setting param %s.%s to %s\n" % \
> (e, cls.__name__, name, value)
> e.args = (msg, )
> raise
>
> def _new_port(cls, name, port):
> # each port should be uniquely assigned to one variable
> assert(not hasattr(port, 'name'))
> port.name = name
> cls._ports[name] = port
> if hasattr(port, 'default'):
> cls._cls_get_port_ref(name).connect(port.default)
>
> # same as _get_port_ref, effectively, but for classes
> def _cls_get_port_ref(cls, attr):
> # Return reference that can be assigned to another port
> # via __setattr__. There is only ever one reference
> # object per port, but we create them lazily here.
> ref = cls._port_refs.get(attr)
> if not ref:
> ref = cls._ports[attr].makeRef(cls)
> cls._port_refs[attr] = ref
> return ref
>
245c274
< self._ports[attr].connect(self, attr, value)
---
> cls._cls_get_port_ref(attr).connect(value)
255c284
< param = cls._params.get(attr, None)
---
> param = cls._params.get(attr)
257,265c286,294
< try:
< cls._values[attr] = param.convert(value)
< except Exception, e:
< msg = "%s\nError setting param %s.%s to %s\n" % \
< (e, cls.__name__, attr, value)
< e.args = (msg, )
< raise
< elif isSimObjectOrSequence(value):
< # if RHS is a SimObject, it's an implicit child assignment
---
> cls._set_param(attr, value, param)
> return
>
> if isSimObjectOrSequence(value):
> # If RHS is a SimObject, it's an implicit child assignment.
> # Classes don't have children, so we just put this object
> # in _values; later, each instance will do a 'setattr(self,
> # attr, _values[attr])' in SimObject.__init__ which will
> # add this object as a child.
267,269c296
< else:
< raise AttributeError, \
< "Class %s has no parameter \'%s\'" % (cls.__name__, attr)
---
> return
270a298,301
> # no valid assignment... raise exception
> raise AttributeError, \
> "Class %s has no parameter \'%s\'" % (cls.__name__, attr)
>
425,427c456,458
< self._port_map = {}
< for key,val in ancestor._port_map.iteritems():
< self._port_map[key] = applyOrMap(val, 'clone', memo_dict)
---
> self._port_refs = {}
> for key,val in ancestor._port_refs.iteritems():
> self._port_refs[key] = val.clone(self, memo_dict)
453a485,494
> def _get_port_ref(self, attr):
> # Return reference that can be assigned to another port
> # via __setattr__. There is only ever one reference
> # object per port, but we create them lazily here.
> ref = self._port_refs.get(attr)
> if not ref:
> ref = self._ports[attr].makeRef(self)
> self._port_refs[attr] = ref
> return ref
>
456,458c497
< # return reference that can be assigned to another port
< # via __setattr__
< return self._ports[attr].makeRef(self, attr)
---
> return self._get_port_ref(attr)
476c515
< self._ports[attr].connect(self, attr, value)
---
> self._get_port_ref(attr).connect(value)
485c524
< param = self._params.get(attr, None)
---
> param = self._params.get(attr)
494,498c533,534
< elif isSimObjectOrSequence(value):
< pass
< else:
< raise AttributeError, "Class %s has no parameter %s" \
< % (self.__class__.__name__, attr)
---
> self._set_child(attr, value)
> return
500,501c536,538
< # clear out old child with this name, if any
< self.clear_child(attr)
---
> if isSimObjectOrSequence(value):
> self._set_child(attr, value)
> return
503,507c540,542
< if isSimObject(value):
< value.set_path(self, attr)
< elif isSimObjectSequence(value):
< value = SimObjVector(value)
< [v.set_path(self, "%s%d" % (attr, i)) for i,v in enumerate(value)]
---
> # no valid assignment... raise exception
> raise AttributeError, "Class %s has no parameter %s" \
> % (self.__class__.__name__, attr)
509d543
< self._values[attr] = value
531c565
< def set_path(self, parent, name):
---
> def _maybe_set_parent(self, parent, name):
536a571,584
> def _set_child(self, attr, value):
> # if RHS is a SimObject, it's an implicit child assignment
> # clear out old child with this name, if any
> self.clear_child(attr)
>
> if isSimObject(value):
> value._maybe_set_parent(self, attr)
> elif isSimObjectSequence(value):
> value = SimObjVector(value)
> [v._maybe_set_parent(self, "%s%d" % (attr, i))
> for i,v in enumerate(value)]
>
> self._values[attr] = value
>
575a624,643
> def unproxy_all(self):
> for param in self._params.iterkeys():
> value = self._values.get(param)
> if value != None and proxy.isproxy(value):
> try:
> value = value.unproxy(self)
> except:
> print "Error in unproxying param '%s' of %s" % \
> (param, self.path())
> raise
> setattr(self, param, value)
>
> for port_name in self._ports.iterkeys():
> port = self._port_refs.get(port_name)
> if port != None:
> port.unproxy(self)
>
> for child in self._children.itervalues():
> child.unproxy_all()
>
594c662
< value = self._values.get(param, None)
---
> value = self._values.get(param)
596,604d663
< if proxy.isproxy(value):
< try:
< value = value.unproxy(self)
< except:
< print >> sys.stderr, \
< "Error in unproxying param '%s' of %s" % \
< (param, self.path())
< raise
< setattr(self, param, value)
610,619c669,671
< port = self._port_map.get(port_name, None)
< if port == None:
< default = getattr(self._ports[port_name], 'default', None)
< if default == None:
< # port is unbound... that's OK, go to next port
< continue
< else:
< print port_name, default
< port = m5.makeList(port) # make list even if it's a scalar port
< print '%s=%s' % (port_name, ' '.join([str(p) for p in port]))
---
> port = self._port_refs.get(port_name, None)
> if port != None:
> print '%s=%s' % (port_name, port.ini_str())
646c698
< # _port_map (& recursively for all children)
---
> # _port_refs (& recursively for all children)
648,649c700,701
< for portRef in self._port_map.itervalues():
< applyOrMap(portRef, 'ccConnect')
---
> for portRef in self._port_refs.itervalues():
> portRef.ccConnect()