tport.hh (8922:17f037ad8918) | tport.hh (8975:7f36d4436074) |
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1/* 2 * Copyright (c) 2012 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 40 unchanged lines hidden (view full) --- 49 * 50 * Declaration of SimpleTimingPort. 51 */ 52 53#include "mem/qport.hh" 54 55/** 56 * The simple timing port uses a queued port to implement | 1/* 2 * Copyright (c) 2012 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 40 unchanged lines hidden (view full) --- 49 * 50 * Declaration of SimpleTimingPort. 51 */ 52 53#include "mem/qport.hh" 54 55/** 56 * The simple timing port uses a queued port to implement |
57 * recvFunctional and recvTiming through recvAtomic. It is always a | 57 * recvFunctional and recvTimingReq through recvAtomic. It is always a |
58 * slave port. 59 */ 60class SimpleTimingPort : public QueuedSlavePort 61{ 62 63 protected: 64 65 /** The packet queue used to store outgoing responses. */ | 58 * slave port. 59 */ 60class SimpleTimingPort : public QueuedSlavePort 61{ 62 63 protected: 64 65 /** The packet queue used to store outgoing responses. */ |
66 PacketQueue queue; | 66 SlavePacketQueue queue; |
67 68 /** Implemented using recvAtomic(). */ 69 void recvFunctional(PacketPtr pkt); 70 71 /** Implemented using recvAtomic(). */ | 67 68 /** Implemented using recvAtomic(). */ 69 void recvFunctional(PacketPtr pkt); 70 71 /** Implemented using recvAtomic(). */ |
72 bool recvTiming(PacketPtr pkt); | 72 bool recvTimingReq(PacketPtr pkt); |
73 74 virtual Tick recvAtomic(PacketPtr pkt) = 0; 75 76 public: 77 78 /** 79 * Create a new SimpleTimingPort that relies on a packet queue to | 73 74 virtual Tick recvAtomic(PacketPtr pkt) = 0; 75 76 public: 77 78 /** 79 * Create a new SimpleTimingPort that relies on a packet queue to |
80 * hold responses, and implements recvTiming and recvFunctional | 80 * hold responses, and implements recvTimingReq and recvFunctional |
81 * through calls to recvAtomic. Once a request arrives, it is 82 * passed to recvAtomic, and in the case of a timing access any 83 * response is scheduled to be sent after the delay of the atomic 84 * operation. 85 * 86 * @param name port name 87 * @param owner structural owner 88 */ 89 SimpleTimingPort(const std::string& name, MemObject* owner); 90 91 virtual ~SimpleTimingPort() { } 92 93}; 94 95#endif // __MEM_TPORT_HH__ | 81 * through calls to recvAtomic. Once a request arrives, it is 82 * passed to recvAtomic, and in the case of a timing access any 83 * response is scheduled to be sent after the delay of the atomic 84 * operation. 85 * 86 * @param name port name 87 * @param owner structural owner 88 */ 89 SimpleTimingPort(const std::string& name, MemObject* owner); 90 91 virtual ~SimpleTimingPort() { } 92 93}; 94 95#endif // __MEM_TPORT_HH__ |