tport.hh (10713:eddb533708cb) tport.hh (11190:0964165d1857)
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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76 void recvFunctional(PacketPtr pkt);
77
78 /** Implemented using recvAtomic(). */
79 bool recvTimingReq(PacketPtr pkt);
80
81 virtual Tick recvAtomic(PacketPtr pkt) = 0;
82
83 /**
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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76 void recvFunctional(PacketPtr pkt);
77
78 /** Implemented using recvAtomic(). */
79 bool recvTimingReq(PacketPtr pkt);
80
81 virtual Tick recvAtomic(PacketPtr pkt) = 0;
82
83 /**
84 * @todo this is a temporary workaround until the 4-phase code is committed.
85 * upstream caches need this packet until true is returned, so hold it for
86 * deletion until a subsequent call
84 * Upstream caches need this packet until true is returned, so
85 * hold it for deletion until a subsequent call
87 */
86 */
88 std::vector<PacketPtr> pendingDelete;
87 std::unique_ptr<Packet> pendingDelete;
89
88
90
91 public:
92
93 /**
94 * Create a new SimpleTimingPort that relies on a packet queue to
95 * hold responses, and implements recvTimingReq and recvFunctional
96 * through calls to recvAtomic. Once a request arrives, it is
97 * passed to recvAtomic, and in the case of a timing access any
98 * response is scheduled to be sent after the delay of the atomic

--- 12 unchanged lines hidden --- 		89 public:
90
91 /**
92 * Create a new SimpleTimingPort that relies on a packet queue to
93 * hold responses, and implements recvTimingReq and recvFunctional
94 * through calls to recvAtomic. Once a request arrives, it is
95 * passed to recvAtomic, and in the case of a timing access any
96 * response is scheduled to be sent after the delay of the atomic

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