1/* 2 * Copyright (c) 2012 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 59 unchanged lines hidden (view full) --- 68 /** Implemented using recvAtomic(). */ 69 void recvFunctional(PacketPtr pkt); 70 71 /** Implemented using recvAtomic(). */ 72 bool recvTimingReq(PacketPtr pkt); 73 74 virtual Tick recvAtomic(PacketPtr pkt) = 0; 75 |
76 /** 77 * @todo this is a temporary workaround until the 4-phase code is committed. 78 * upstream caches need this packet until true is returned, so hold it for 79 * deletion until a subsequent call 80 */ 81 std::vector<PacketPtr> pendingDelete; 82 83 |
84 public: 85 86 /** 87 * Create a new SimpleTimingPort that relies on a packet queue to 88 * hold responses, and implements recvTimingReq and recvFunctional 89 * through calls to recvAtomic. Once a request arrives, it is 90 * passed to recvAtomic, and in the case of a timing access any 91 * response is scheduled to be sent after the delay of the atomic --- 12 unchanged lines hidden --- |