tport.cc (8708:7ccbdea0fa12) | tport.cc (8856:241ee47b0dc6) |
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1/* | 1/* |
2 * Copyright (c) 2012 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * |
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2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright --- 11 unchanged lines hidden (view full) --- 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Ali Saidi | 14 * Copyright (c) 2006 The Regents of The University of Michigan 15 * All rights reserved. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions are 19 * met: redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer; 21 * redistributions in binary form must reproduce the above copyright --- 11 unchanged lines hidden (view full) --- 33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39 * 40 * Authors: Ali Saidi |
41 * Andreas Hansson |
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29 */ 30 31#include "debug/Bus.hh" 32#include "mem/mem_object.hh" 33#include "mem/tport.hh" 34 35using namespace std; 36 | 42 */ 43 44#include "debug/Bus.hh" 45#include "mem/mem_object.hh" 46#include "mem/tport.hh" 47 48using namespace std; 49 |
37SimpleTimingPort::SimpleTimingPort(string pname, MemObject *_owner) 38 : Port(pname, _owner), sendEvent(NULL), drainEvent(NULL), | 50SimpleTimingPort::SimpleTimingPort(const string &_name, MemObject *_owner, 51 const string _label) 52 : Port(_name, _owner), label(_label), sendEvent(this), drainEvent(NULL), |
39 waitingOnRetry(false) 40{ | 53 waitingOnRetry(false) 54{ |
41 sendEvent = new EventWrapper<SimpleTimingPort, 42 &SimpleTimingPort::processSendEvent>(this); | |
43} 44 45SimpleTimingPort::~SimpleTimingPort() 46{ | 55} 56 57SimpleTimingPort::~SimpleTimingPort() 58{ |
47 delete sendEvent; | |
48} 49 50bool 51SimpleTimingPort::checkFunctional(PacketPtr pkt) 52{ | 59} 60 61bool 62SimpleTimingPort::checkFunctional(PacketPtr pkt) 63{ |
64 pkt->pushLabel(label); 65 |
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53 DeferredPacketIterator i = transmitList.begin(); 54 DeferredPacketIterator end = transmitList.end(); | 66 DeferredPacketIterator i = transmitList.begin(); 67 DeferredPacketIterator end = transmitList.end(); |
68 bool found = false; |
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55 | 69 |
56 for (; i != end; ++i) { 57 PacketPtr target = i->pkt; 58 // If the target contains data, and it overlaps the 59 // probed request, need to update data 60 if (pkt->checkFunctional(target)) { 61 return true; 62 } | 70 while (!found && i != end) { 71 // If the buffered packet contains data, and it overlaps the 72 // current packet, then update data 73 found = pkt->checkFunctional(i->pkt); 74 ++i; |
63 } 64 | 75 } 76 |
65 return false; | 77 pkt->popLabel(); 78 79 return found; |
66} 67 68void 69SimpleTimingPort::recvFunctional(PacketPtr pkt) 70{ 71 if (!checkFunctional(pkt)) { 72 // Just do an atomic access and throw away the returned latency 73 recvAtomic(pkt); --- 29 unchanged lines hidden (view full) --- 103 } 104 105 return true; 106} 107 108void 109SimpleTimingPort::schedSendEvent(Tick when) 110{ | 80} 81 82void 83SimpleTimingPort::recvFunctional(PacketPtr pkt) 84{ 85 if (!checkFunctional(pkt)) { 86 // Just do an atomic access and throw away the returned latency 87 recvAtomic(pkt); --- 29 unchanged lines hidden (view full) --- 117 } 118 119 return true; 120} 121 122void 123SimpleTimingPort::schedSendEvent(Tick when) 124{ |
125 // if we are waiting on a retry, do not schedule a send event, and 126 // instead rely on retry being called |
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111 if (waitingOnRetry) { | 127 if (waitingOnRetry) { |
112 assert(!sendEvent->scheduled()); | 128 assert(!sendEvent.scheduled()); |
113 return; 114 } 115 | 129 return; 130 } 131 |
116 if (!sendEvent->scheduled()) { 117 owner->schedule(sendEvent, when); 118 } else if (sendEvent->when() > when) { 119 owner->reschedule(sendEvent, when); | 132 if (!sendEvent.scheduled()) { 133 owner->schedule(&sendEvent, when); 134 } else if (sendEvent.when() > when) { 135 owner->reschedule(&sendEvent, when); |
120 } 121} 122 123void 124SimpleTimingPort::schedSendTiming(PacketPtr pkt, Tick when) 125{ 126 assert(when > curTick()); 127 assert(when < curTick() + SimClock::Int::ms); --- 20 unchanged lines hidden (view full) --- 148 if (when < i->tick) { 149 transmitList.insert(i, DeferredPacket(when, pkt)); 150 return; 151 } 152 } 153 assert(false); // should never get here 154} 155 | 136 } 137} 138 139void 140SimpleTimingPort::schedSendTiming(PacketPtr pkt, Tick when) 141{ 142 assert(when > curTick()); 143 assert(when < curTick() + SimClock::Int::ms); --- 20 unchanged lines hidden (view full) --- 164 if (when < i->tick) { 165 transmitList.insert(i, DeferredPacket(when, pkt)); 166 return; 167 } 168 } 169 assert(false); // should never get here 170} 171 |
156 157void 158SimpleTimingPort::sendDeferredPacket() | 172void SimpleTimingPort::trySendTiming() |
159{ 160 assert(deferredPacketReady()); | 173{ 174 assert(deferredPacketReady()); |
161 // take packet off list here; if recvTiming() on the other side 162 // calls sendTiming() back on us (like SimpleTimingCpu does), then 163 // we get confused by having a non-active packet on transmitList | 175 // take the next packet off the list here, as we might return to 176 // ourselves through the sendTiming call below |
164 DeferredPacket dp = transmitList.front(); 165 transmitList.pop_front(); | 177 DeferredPacket dp = transmitList.front(); 178 transmitList.pop_front(); |
166 bool success = sendTiming(dp.pkt); | |
167 | 179 |
168 if (success) { 169 if (!transmitList.empty() && !sendEvent->scheduled()) { 170 Tick time = transmitList.front().tick; 171 owner->schedule(sendEvent, time <= curTick() ? curTick()+1 : time); 172 } | 180 // attempt to send the packet and remember the outcome 181 waitingOnRetry = !sendTiming(dp.pkt); |
173 | 182 |
174 if (transmitList.empty() && drainEvent && !sendEvent->scheduled()) { | 183 if (waitingOnRetry) { 184 // put the packet back at the front of the list (packet should 185 // not have changed since it wasn't accepted) 186 assert(!sendEvent.scheduled()); 187 transmitList.push_front(dp); 188 } 189} 190 191void 192SimpleTimingPort::scheduleSend(Tick time) 193{ 194 // the next ready time is either determined by the next deferred packet, 195 // or in the cache through the MSHR ready time 196 Tick nextReady = std::min(deferredPacketReadyTime(), time); 197 if (nextReady != MaxTick) { 198 // if the sendTiming caused someone else to call our 199 // recvTiming we could already have an event scheduled, check 200 if (!sendEvent.scheduled()) 201 owner->schedule(&sendEvent, std::max(nextReady, curTick() + 1)); 202 } else { 203 // no more to send, so if we're draining, we may be done 204 if (drainEvent && !sendEvent.scheduled()) { |
175 drainEvent->process(); 176 drainEvent = NULL; 177 } | 205 drainEvent->process(); 206 drainEvent = NULL; 207 } |
178 } else { 179 // Unsuccessful, need to put back on transmitList. Callee 180 // should not have messed with it (since it didn't accept that 181 // packet), so we can just push it back on the front. 182 assert(!sendEvent->scheduled()); 183 transmitList.push_front(dp); | |
184 } | 208 } |
209} |
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185 | 210 |
186 waitingOnRetry = !success; | 211void 212SimpleTimingPort::sendDeferredPacket() 213{ 214 // try to send what is on the list 215 trySendTiming(); |
187 | 216 |
188 if (waitingOnRetry) { 189 DPRINTF(Bus, "Send failed, waiting on retry\n"); | 217 // if we succeeded and are not waiting for a retry, schedule the 218 // next send 219 if (!waitingOnRetry) { 220 scheduleSend(); |
190 } 191} 192 193 194void 195SimpleTimingPort::recvRetry() 196{ 197 DPRINTF(Bus, "Received retry\n"); | 221 } 222} 223 224 225void 226SimpleTimingPort::recvRetry() 227{ 228 DPRINTF(Bus, "Received retry\n"); |
229 // note that in the cache we get a retry even though we may not 230 // have a packet to retry (we could potentially decide on a new 231 // packet every time we retry) |
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198 assert(waitingOnRetry); 199 sendDeferredPacket(); 200} 201 202 203void 204SimpleTimingPort::processSendEvent() 205{ 206 assert(!waitingOnRetry); 207 sendDeferredPacket(); 208} 209 210 211unsigned int 212SimpleTimingPort::drain(Event *de) 213{ | 232 assert(waitingOnRetry); 233 sendDeferredPacket(); 234} 235 236 237void 238SimpleTimingPort::processSendEvent() 239{ 240 assert(!waitingOnRetry); 241 sendDeferredPacket(); 242} 243 244 245unsigned int 246SimpleTimingPort::drain(Event *de) 247{ |
214 if (transmitList.size() == 0 && !sendEvent->scheduled()) | 248 if (transmitList.empty() && !sendEvent.scheduled()) |
215 return 0; 216 drainEvent = de; 217 return 1; 218} | 249 return 0; 250 drainEvent = de; 251 return 1; 252} |