1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 48 unchanged lines hidden (view full) ---

57 // do an atomic access and throw away the returned latency
58 recvAtomic(pkt);
59 }
60}
61
62bool
63SimpleTimingPort::recvTimingReq(PacketPtr pkt)
64{
65 /// @todo temporary hack to deal with memory corruption issue until
66 /// 4-phase transactions are complete. Remove me later
67 for (int x = 0; x < pendingDelete.size(); x++)
68 delete pendingDelete[x];
69 pendingDelete.clear();
70
71 if (pkt->memInhibitAsserted()) {
72 // snooper will supply based on copy of packet
73 // still target's responsibility to delete packet
74 delete pkt;
75 return true;
76 }
77
78 bool needsResponse = pkt->needsResponse();
79 Tick latency = recvAtomic(pkt);
80 // turn packet around to go back to requester if response expected
81 if (needsResponse) {
82 // recvAtomic() should already have turned packet into
83 // atomic response
84 assert(pkt->isResponse());
85 queue.schedSendTiming(pkt, curTick() + latency);
86 } else {
81 delete pkt;
87 /// @todo nominally we should just delete the packet here.
88 /// Until 4-phase stuff we can't because the sending
89 /// cache is still relying on it
90 pendingDelete.push_back(pkt);
91 }
92
93 return true;
94}