1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 49 unchanged lines hidden (view full) ---

58 recvAtomic(pkt);
59 }
60}
61
62bool
63SimpleTimingPort::recvTimingReq(PacketPtr pkt)
64{
65 // the SimpleTimingPort should not be used anywhere where there is
66 // a need to deal with inhibited packets
67 if (pkt->memInhibitAsserted())
68 panic("SimpleTimingPort should never see an inhibited request\n");
66 // a need to deal with snoop responses and their flow control
67 // requirements
68 if (pkt->cacheResponding())
69 panic("SimpleTimingPort should never see packets with the "
70 "cacheResponding flag set\n");
71
72 bool needsResponse = pkt->needsResponse();
73 Tick latency = recvAtomic(pkt);
74 // turn packet around to go back to requester if response expected
75 if (needsResponse) {
76 // recvAtomic() should already have turned packet into
77 // atomic response
78 assert(pkt->isResponse());
79 schedTimingResp(pkt, curTick() + latency);
80 } else {
81 // queue the packet for deletion
82 pendingDelete.reset(pkt);
83 }
84
85 return true;
86}