1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 */
30
31#include "debug/Bus.hh"
| 1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 */
30
31#include "debug/Bus.hh"
|
| 32#include "mem/mem_object.hh"
|
32#include "mem/tport.hh"
33
34using namespace std;
35
36SimpleTimingPort::SimpleTimingPort(string pname, MemObject *_owner)
| 33#include "mem/tport.hh"
34
35using namespace std;
36
37SimpleTimingPort::SimpleTimingPort(string pname, MemObject *_owner)
|
37 : Port(pname, _owner), sendEvent(0), drainEvent(NULL),
| 38 : Port(pname, _owner), sendEvent(NULL), drainEvent(NULL),
|
38 waitingOnRetry(false)
39{
40 sendEvent = new EventWrapper<SimpleTimingPort,
41 &SimpleTimingPort::processSendEvent>(this);
42}
43
44SimpleTimingPort::~SimpleTimingPort()
45{
46 delete sendEvent;
47}
48
49bool
50SimpleTimingPort::checkFunctional(PacketPtr pkt)
51{
52 DeferredPacketIterator i = transmitList.begin();
53 DeferredPacketIterator end = transmitList.end();
54
55 for (; i != end; ++i) {
56 PacketPtr target = i->pkt;
57 // If the target contains data, and it overlaps the
58 // probed request, need to update data
59 if (pkt->checkFunctional(target)) {
60 return true;
61 }
62 }
63
64 return false;
65}
66
67void
68SimpleTimingPort::recvFunctional(PacketPtr pkt)
69{
70 if (!checkFunctional(pkt)) {
71 // Just do an atomic access and throw away the returned latency
72 recvAtomic(pkt);
73 }
74}
75
76bool
77SimpleTimingPort::recvTiming(PacketPtr pkt)
78{
79 // If the device is only a slave, it should only be sending
80 // responses, which should never get nacked. There used to be
81 // code to hanldle nacks here, but I'm pretty sure it didn't work
82 // correctly with the drain code, so that would need to be fixed
83 // if we ever added it back.
84
85 if (pkt->memInhibitAsserted()) {
86 // snooper will supply based on copy of packet
87 // still target's responsibility to delete packet
88 delete pkt;
89 return true;
90 }
91
92 bool needsResponse = pkt->needsResponse();
93 Tick latency = recvAtomic(pkt);
94 // turn packet around to go back to requester if response expected
95 if (needsResponse) {
96 // recvAtomic() should already have turned packet into
97 // atomic response
98 assert(pkt->isResponse());
99 schedSendTiming(pkt, curTick() + latency);
100 } else {
101 delete pkt;
102 }
103
104 return true;
105}
106
| 39 waitingOnRetry(false)
40{
41 sendEvent = new EventWrapper<SimpleTimingPort,
42 &SimpleTimingPort::processSendEvent>(this);
43}
44
45SimpleTimingPort::~SimpleTimingPort()
46{
47 delete sendEvent;
48}
49
50bool
51SimpleTimingPort::checkFunctional(PacketPtr pkt)
52{
53 DeferredPacketIterator i = transmitList.begin();
54 DeferredPacketIterator end = transmitList.end();
55
56 for (; i != end; ++i) {
57 PacketPtr target = i->pkt;
58 // If the target contains data, and it overlaps the
59 // probed request, need to update data
60 if (pkt->checkFunctional(target)) {
61 return true;
62 }
63 }
64
65 return false;
66}
67
68void
69SimpleTimingPort::recvFunctional(PacketPtr pkt)
70{
71 if (!checkFunctional(pkt)) {
72 // Just do an atomic access and throw away the returned latency
73 recvAtomic(pkt);
74 }
75}
76
77bool
78SimpleTimingPort::recvTiming(PacketPtr pkt)
79{
80 // If the device is only a slave, it should only be sending
81 // responses, which should never get nacked. There used to be
82 // code to hanldle nacks here, but I'm pretty sure it didn't work
83 // correctly with the drain code, so that would need to be fixed
84 // if we ever added it back.
85
86 if (pkt->memInhibitAsserted()) {
87 // snooper will supply based on copy of packet
88 // still target's responsibility to delete packet
89 delete pkt;
90 return true;
91 }
92
93 bool needsResponse = pkt->needsResponse();
94 Tick latency = recvAtomic(pkt);
95 // turn packet around to go back to requester if response expected
96 if (needsResponse) {
97 // recvAtomic() should already have turned packet into
98 // atomic response
99 assert(pkt->isResponse());
100 schedSendTiming(pkt, curTick() + latency);
101 } else {
102 delete pkt;
103 }
104
105 return true;
106}
107
|
| 108void
109SimpleTimingPort::schedSendEvent(Tick when)
110{
111 if (waitingOnRetry) {
112 assert(!sendEvent->scheduled());
113 return;
114 }
|
107
| 115
|
| 116 if (!sendEvent->scheduled()) {
117 owner->schedule(sendEvent, when);
118 } else if (sendEvent->when() > when) {
119 owner->reschedule(sendEvent, when);
120 }
121}
122
|
108void
109SimpleTimingPort::schedSendTiming(PacketPtr pkt, Tick when)
110{
111 assert(when > curTick());
112 assert(when < curTick() + SimClock::Int::ms);
113
114 // Nothing is on the list: add it and schedule an event
115 if (transmitList.empty() || when < transmitList.front().tick) {
116 transmitList.push_front(DeferredPacket(when, pkt));
117 schedSendEvent(when);
118 return;
119 }
120
121 // list is non-empty & this belongs at the end
122 if (when >= transmitList.back().tick) {
123 transmitList.push_back(DeferredPacket(when, pkt));
124 return;
125 }
126
127 // this belongs in the middle somewhere
128 DeferredPacketIterator i = transmitList.begin();
129 i++; // already checked for insertion at front
130 DeferredPacketIterator end = transmitList.end();
131
132 for (; i != end; ++i) {
133 if (when < i->tick) {
134 transmitList.insert(i, DeferredPacket(when, pkt));
135 return;
136 }
137 }
138 assert(false); // should never get here
139}
140
141
142void
143SimpleTimingPort::sendDeferredPacket()
144{
145 assert(deferredPacketReady());
146 // take packet off list here; if recvTiming() on the other side
147 // calls sendTiming() back on us (like SimpleTimingCpu does), then
148 // we get confused by having a non-active packet on transmitList
149 DeferredPacket dp = transmitList.front();
150 transmitList.pop_front();
151 bool success = sendTiming(dp.pkt);
152
153 if (success) {
154 if (!transmitList.empty() && !sendEvent->scheduled()) {
155 Tick time = transmitList.front().tick;
| 123void
124SimpleTimingPort::schedSendTiming(PacketPtr pkt, Tick when)
125{
126 assert(when > curTick());
127 assert(when < curTick() + SimClock::Int::ms);
128
129 // Nothing is on the list: add it and schedule an event
130 if (transmitList.empty() || when < transmitList.front().tick) {
131 transmitList.push_front(DeferredPacket(when, pkt));
132 schedSendEvent(when);
133 return;
134 }
135
136 // list is non-empty & this belongs at the end
137 if (when >= transmitList.back().tick) {
138 transmitList.push_back(DeferredPacket(when, pkt));
139 return;
140 }
141
142 // this belongs in the middle somewhere
143 DeferredPacketIterator i = transmitList.begin();
144 i++; // already checked for insertion at front
145 DeferredPacketIterator end = transmitList.end();
146
147 for (; i != end; ++i) {
148 if (when < i->tick) {
149 transmitList.insert(i, DeferredPacket(when, pkt));
150 return;
151 }
152 }
153 assert(false); // should never get here
154}
155
156
157void
158SimpleTimingPort::sendDeferredPacket()
159{
160 assert(deferredPacketReady());
161 // take packet off list here; if recvTiming() on the other side
162 // calls sendTiming() back on us (like SimpleTimingCpu does), then
163 // we get confused by having a non-active packet on transmitList
164 DeferredPacket dp = transmitList.front();
165 transmitList.pop_front();
166 bool success = sendTiming(dp.pkt);
167
168 if (success) {
169 if (!transmitList.empty() && !sendEvent->scheduled()) {
170 Tick time = transmitList.front().tick;
|
156 schedule(sendEvent, time <= curTick() ? curTick()+1 : time);
| 171 owner->schedule(sendEvent, time <= curTick() ? curTick()+1 : time);
|
157 }
158
159 if (transmitList.empty() && drainEvent && !sendEvent->scheduled()) {
160 drainEvent->process();
161 drainEvent = NULL;
162 }
163 } else {
164 // Unsuccessful, need to put back on transmitList. Callee
165 // should not have messed with it (since it didn't accept that
166 // packet), so we can just push it back on the front.
167 assert(!sendEvent->scheduled());
168 transmitList.push_front(dp);
169 }
170
171 waitingOnRetry = !success;
172
173 if (waitingOnRetry) {
174 DPRINTF(Bus, "Send failed, waiting on retry\n");
175 }
176}
177
178
179void
180SimpleTimingPort::recvRetry()
181{
182 DPRINTF(Bus, "Received retry\n");
183 assert(waitingOnRetry);
184 sendDeferredPacket();
185}
186
187
188void
189SimpleTimingPort::processSendEvent()
190{
191 assert(!waitingOnRetry);
192 sendDeferredPacket();
193}
194
195
196unsigned int
197SimpleTimingPort::drain(Event *de)
198{
199 if (transmitList.size() == 0 && !sendEvent->scheduled())
200 return 0;
201 drainEvent = de;
202 return 1;
203}
| 172 }
173
174 if (transmitList.empty() && drainEvent && !sendEvent->scheduled()) {
175 drainEvent->process();
176 drainEvent = NULL;
177 }
178 } else {
179 // Unsuccessful, need to put back on transmitList. Callee
180 // should not have messed with it (since it didn't accept that
181 // packet), so we can just push it back on the front.
182 assert(!sendEvent->scheduled());
183 transmitList.push_front(dp);
184 }
185
186 waitingOnRetry = !success;
187
188 if (waitingOnRetry) {
189 DPRINTF(Bus, "Send failed, waiting on retry\n");
190 }
191}
192
193
194void
195SimpleTimingPort::recvRetry()
196{
197 DPRINTF(Bus, "Received retry\n");
198 assert(waitingOnRetry);
199 sendDeferredPacket();
200}
201
202
203void
204SimpleTimingPort::processSendEvent()
205{
206 assert(!waitingOnRetry);
207 sendDeferredPacket();
208}
209
210
211unsigned int
212SimpleTimingPort::drain(Event *de)
213{
214 if (transmitList.size() == 0 && !sendEvent->scheduled())
215 return 0;
216 drainEvent = de;
217 return 1;
218}
|