tport.cc (5693:4bf6f614871b) tport.cc (5740:983b71bfc1bd)
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 */
30
31#include "mem/tport.hh"
32
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 */
30
31#include "mem/tport.hh"
32
33using namespace std;
34
35SimpleTimingPort::SimpleTimingPort(string pname, MemObject *_owner)
36 : Port(pname, _owner), sendEvent(0), drainEvent(NULL),
37 waitingOnRetry(false)
38{
39 sendEvent = new EventWrapper<SimpleTimingPort,
40 &SimpleTimingPort::processSendEvent>(this);
41}
42
43SimpleTimingPort::~SimpleTimingPort()
44{
45 delete sendEvent;
46}
47
33bool
34SimpleTimingPort::checkFunctional(PacketPtr pkt)
35{
36 DeferredPacketIterator i = transmitList.begin();
37 DeferredPacketIterator end = transmitList.end();
38
39 for (; i != end; ++i) {
40 PacketPtr target = i->pkt;
41 // If the target contains data, and it overlaps the
42 // probed request, need to update data
43 if (pkt->checkFunctional(target)) {
44 return true;
45 }
46 }
47
48 return false;
49}
50
51void
52SimpleTimingPort::recvFunctional(PacketPtr pkt)
53{
54 if (!checkFunctional(pkt)) {
55 // Just do an atomic access and throw away the returned latency
56 recvAtomic(pkt);
57 }
58}
59
60bool
61SimpleTimingPort::recvTiming(PacketPtr pkt)
62{
63 // If the device is only a slave, it should only be sending
64 // responses, which should never get nacked. There used to be
65 // code to hanldle nacks here, but I'm pretty sure it didn't work
66 // correctly with the drain code, so that would need to be fixed
67 // if we ever added it back.
68
69 if (pkt->memInhibitAsserted()) {
70 // snooper will supply based on copy of packet
71 // still target's responsibility to delete packet
72 delete pkt;
73 return true;
74 }
75
76 bool needsResponse = pkt->needsResponse();
77 Tick latency = recvAtomic(pkt);
78 // turn packet around to go back to requester if response expected
79 if (needsResponse) {
80 // recvAtomic() should already have turned packet into
81 // atomic response
82 assert(pkt->isResponse());
83 schedSendTiming(pkt, curTick + latency);
84 } else {
85 delete pkt;
86 }
87
88 return true;
89}
90
91
92void
93SimpleTimingPort::schedSendTiming(PacketPtr pkt, Tick when)
94{
95 assert(when > curTick);
96 assert(when < curTick + Clock::Int::ms);
97
98 // Nothing is on the list: add it and schedule an event
99 if (transmitList.empty() || when < transmitList.front().tick) {
100 transmitList.push_front(DeferredPacket(when, pkt));
101 schedSendEvent(when);
102 return;
103 }
104
105 // list is non-empty & this belongs at the end
106 if (when >= transmitList.back().tick) {
107 transmitList.push_back(DeferredPacket(when, pkt));
108 return;
109 }
110
111 // this belongs in the middle somewhere
112 DeferredPacketIterator i = transmitList.begin();
113 i++; // already checked for insertion at front
114 DeferredPacketIterator end = transmitList.end();
115
116 for (; i != end; ++i) {
117 if (when < i->tick) {
118 transmitList.insert(i, DeferredPacket(when, pkt));
119 return;
120 }
121 }
122 assert(false); // should never get here
123}
124
125
126void
127SimpleTimingPort::sendDeferredPacket()
128{
129 assert(deferredPacketReady());
130 // take packet off list here; if recvTiming() on the other side
131 // calls sendTiming() back on us (like SimpleTimingCpu does), then
132 // we get confused by having a non-active packet on transmitList
133 DeferredPacket dp = transmitList.front();
134 transmitList.pop_front();
135 bool success = sendTiming(dp.pkt);
136
137 if (success) {
138 if (!transmitList.empty() && !sendEvent->scheduled()) {
139 Tick time = transmitList.front().tick;
140 schedule(sendEvent, time <= curTick ? curTick+1 : time);
141 }
142
143 if (transmitList.empty() && drainEvent) {
144 drainEvent->process();
145 drainEvent = NULL;
146 }
147 } else {
148 // Unsuccessful, need to put back on transmitList. Callee
149 // should not have messed with it (since it didn't accept that
150 // packet), so we can just push it back on the front.
151 assert(!sendEvent->scheduled());
152 transmitList.push_front(dp);
153 }
154
155 waitingOnRetry = !success;
156
157 if (waitingOnRetry) {
158 DPRINTF(Bus, "Send failed, waiting on retry\n");
159 }
160}
161
162
163void
164SimpleTimingPort::recvRetry()
165{
166 DPRINTF(Bus, "Received retry\n");
167 assert(waitingOnRetry);
168 sendDeferredPacket();
169}
170
171
172void
173SimpleTimingPort::processSendEvent()
174{
175 assert(!waitingOnRetry);
176 sendDeferredPacket();
177}
178
179
180unsigned int
181SimpleTimingPort::drain(Event *de)
182{
183 if (transmitList.size() == 0)
184 return 0;
185 drainEvent = de;
186 return 1;
187}
48bool
49SimpleTimingPort::checkFunctional(PacketPtr pkt)
50{
51 DeferredPacketIterator i = transmitList.begin();
52 DeferredPacketIterator end = transmitList.end();
53
54 for (; i != end; ++i) {
55 PacketPtr target = i->pkt;
56 // If the target contains data, and it overlaps the
57 // probed request, need to update data
58 if (pkt->checkFunctional(target)) {
59 return true;
60 }
61 }
62
63 return false;
64}
65
66void
67SimpleTimingPort::recvFunctional(PacketPtr pkt)
68{
69 if (!checkFunctional(pkt)) {
70 // Just do an atomic access and throw away the returned latency
71 recvAtomic(pkt);
72 }
73}
74
75bool
76SimpleTimingPort::recvTiming(PacketPtr pkt)
77{
78 // If the device is only a slave, it should only be sending
79 // responses, which should never get nacked. There used to be
80 // code to hanldle nacks here, but I'm pretty sure it didn't work
81 // correctly with the drain code, so that would need to be fixed
82 // if we ever added it back.
83
84 if (pkt->memInhibitAsserted()) {
85 // snooper will supply based on copy of packet
86 // still target's responsibility to delete packet
87 delete pkt;
88 return true;
89 }
90
91 bool needsResponse = pkt->needsResponse();
92 Tick latency = recvAtomic(pkt);
93 // turn packet around to go back to requester if response expected
94 if (needsResponse) {
95 // recvAtomic() should already have turned packet into
96 // atomic response
97 assert(pkt->isResponse());
98 schedSendTiming(pkt, curTick + latency);
99 } else {
100 delete pkt;
101 }
102
103 return true;
104}
105
106
107void
108SimpleTimingPort::schedSendTiming(PacketPtr pkt, Tick when)
109{
110 assert(when > curTick);
111 assert(when < curTick + Clock::Int::ms);
112
113 // Nothing is on the list: add it and schedule an event
114 if (transmitList.empty() || when < transmitList.front().tick) {
115 transmitList.push_front(DeferredPacket(when, pkt));
116 schedSendEvent(when);
117 return;
118 }
119
120 // list is non-empty & this belongs at the end
121 if (when >= transmitList.back().tick) {
122 transmitList.push_back(DeferredPacket(when, pkt));
123 return;
124 }
125
126 // this belongs in the middle somewhere
127 DeferredPacketIterator i = transmitList.begin();
128 i++; // already checked for insertion at front
129 DeferredPacketIterator end = transmitList.end();
130
131 for (; i != end; ++i) {
132 if (when < i->tick) {
133 transmitList.insert(i, DeferredPacket(when, pkt));
134 return;
135 }
136 }
137 assert(false); // should never get here
138}
139
140
141void
142SimpleTimingPort::sendDeferredPacket()
143{
144 assert(deferredPacketReady());
145 // take packet off list here; if recvTiming() on the other side
146 // calls sendTiming() back on us (like SimpleTimingCpu does), then
147 // we get confused by having a non-active packet on transmitList
148 DeferredPacket dp = transmitList.front();
149 transmitList.pop_front();
150 bool success = sendTiming(dp.pkt);
151
152 if (success) {
153 if (!transmitList.empty() && !sendEvent->scheduled()) {
154 Tick time = transmitList.front().tick;
155 schedule(sendEvent, time <= curTick ? curTick+1 : time);
156 }
157
158 if (transmitList.empty() && drainEvent) {
159 drainEvent->process();
160 drainEvent = NULL;
161 }
162 } else {
163 // Unsuccessful, need to put back on transmitList. Callee
164 // should not have messed with it (since it didn't accept that
165 // packet), so we can just push it back on the front.
166 assert(!sendEvent->scheduled());
167 transmitList.push_front(dp);
168 }
169
170 waitingOnRetry = !success;
171
172 if (waitingOnRetry) {
173 DPRINTF(Bus, "Send failed, waiting on retry\n");
174 }
175}
176
177
178void
179SimpleTimingPort::recvRetry()
180{
181 DPRINTF(Bus, "Received retry\n");
182 assert(waitingOnRetry);
183 sendDeferredPacket();
184}
185
186
187void
188SimpleTimingPort::processSendEvent()
189{
190 assert(!waitingOnRetry);
191 sendDeferredPacket();
192}
193
194
195unsigned int
196SimpleTimingPort::drain(Event *de)
197{
198 if (transmitList.size() == 0)
199 return 0;
200 drainEvent = de;
201 return 1;
202}