StateMachine.py (9338:97b4a2be1e5b) StateMachine.py (9364:e5fc9d588132)
1# Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
2# Copyright (c) 2009 The Hewlett-Packard Development Company
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions are
7# met: redistributions of source code must retain the above copyright
8# notice, this list of conditions and the following disclaimer;

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28from m5.util import orderdict
29
30from slicc.symbols.Symbol import Symbol
31from slicc.symbols.Var import Var
32import slicc.generate.html as html
33import re
34
35python_class_map = {"int": "Int",
1# Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
2# Copyright (c) 2009 The Hewlett-Packard Development Company
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions are
7# met: redistributions of source code must retain the above copyright
8# notice, this list of conditions and the following disclaimer;

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28from m5.util import orderdict
29
30from slicc.symbols.Symbol import Symbol
31from slicc.symbols.Var import Var
32import slicc.generate.html as html
33import re
34
35python_class_map = {"int": "Int",
36 "uint32_t" : "UInt32",
36 "std::string": "String",
37 "bool": "Bool",
38 "CacheMemory": "RubyCache",
39 "WireBuffer": "RubyWireBuffer",
40 "Sequencer": "RubySequencer",
41 "DirectoryMemory": "RubyDirectoryMemory",
42 "MemoryControl": "MemoryControl",
43 "DMASequencer": "DMASequencer"

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256 const int & getVersion() const;
257 const std::string toString() const;
258 const std::string getName() const;
259 void stallBuffer(MessageBuffer* buf, Address addr);
260 void wakeUpBuffers(Address addr);
261 void wakeUpAllBuffers();
262 void initNetworkPtr(Network* net_ptr) { m_net_ptr = net_ptr; }
263 void print(std::ostream& out) const;
37 "std::string": "String",
38 "bool": "Bool",
39 "CacheMemory": "RubyCache",
40 "WireBuffer": "RubyWireBuffer",
41 "Sequencer": "RubySequencer",
42 "DirectoryMemory": "RubyDirectoryMemory",
43 "MemoryControl": "MemoryControl",
44 "DMASequencer": "DMASequencer"

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257 const int & getVersion() const;
258 const std::string toString() const;
259 const std::string getName() const;
260 void stallBuffer(MessageBuffer* buf, Address addr);
261 void wakeUpBuffers(Address addr);
262 void wakeUpAllBuffers();
263 void initNetworkPtr(Network* net_ptr) { m_net_ptr = net_ptr; }
264 void print(std::ostream& out) const;
264 void printConfig(std::ostream& out) const;
265 void wakeup();
266 void printStats(std::ostream& out) const;
267 void clearStats();
268 void blockOnQueue(Address addr, MessageBuffer* port);
269 void unblock(Address addr);
270 void recordCacheTrace(int cntrl, CacheRecorder* tr);
271 Sequencer* getSequencer() const;
272

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280 # added by SS
281 for param in self.config_parameters:
282 if param.pointer:
283 code('${{param.type_ast.type}}* m_${{param.ident}}_ptr;')
284 else:
285 code('${{param.type_ast.type}} m_${{param.ident}};')
286
287 code('''
265 void wakeup();
266 void printStats(std::ostream& out) const;
267 void clearStats();
268 void blockOnQueue(Address addr, MessageBuffer* port);
269 void unblock(Address addr);
270 void recordCacheTrace(int cntrl, CacheRecorder* tr);
271 Sequencer* getSequencer() const;
272

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280 # added by SS
281 for param in self.config_parameters:
282 if param.pointer:
283 code('${{param.type_ast.type}}* m_${{param.ident}}_ptr;')
284 else:
285 code('${{param.type_ast.type}} m_${{param.ident}};')
286
287 code('''
288int m_number_of_TBEs;
289
290TransitionResult doTransition(${ident}_Event event,
291''')
292
293 if self.EntryType != None:
294 code('''
295 ${{self.EntryType.c_ident}}* m_cache_entry_ptr,
296''')
297 if self.TBEType != None:

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314 if self.EntryType != None:
315 code('''
316 ${{self.EntryType.c_ident}}*& m_cache_entry_ptr,
317''')
318
319 code('''
320 const Address& addr);
321
288TransitionResult doTransition(${ident}_Event event,
289''')
290
291 if self.EntryType != None:
292 code('''
293 ${{self.EntryType.c_ident}}* m_cache_entry_ptr,
294''')
295 if self.TBEType != None:

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312 if self.EntryType != None:
313 code('''
314 ${{self.EntryType.c_ident}}*& m_cache_entry_ptr,
315''')
316
317 code('''
318 const Address& addr);
319
322std::string m_name;
323int m_transitions_per_cycle;
324int m_buffer_size;
325int m_recycle_latency;
326std::map<std::string, std::string> m_cfg;
327NodeID m_version;
328Network* m_net_ptr;
329MachineID m_machineID;
330bool m_is_blocking;
331std::map<Address, MessageBuffer*> m_block_map;
332typedef std::vector<MessageBuffer*> MsgVecType;
333typedef std::map< Address, MsgVecType* > WaitingBufType;
334WaitingBufType m_waiting_buffers;
335int m_max_in_port_rank;
336int m_cur_in_port_rank;
337static ${ident}_ProfileDumper s_profileDumper;
338${ident}_Profiler m_profiler;
339static int m_num_controllers;
340
341// Internal functions
342''')
343
344 for func in self.functions:

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460// for adding information to the protocol debug trace
461stringstream ${ident}_transitionComment;
462#define APPEND_TRANSITION_COMMENT(str) (${ident}_transitionComment << str)
463
464/** \\brief constructor */
465$c_ident::$c_ident(const Params *p)
466 : AbstractController(p)
467{
320static ${ident}_ProfileDumper s_profileDumper;
321${ident}_Profiler m_profiler;
322static int m_num_controllers;
323
324// Internal functions
325''')
326
327 for func in self.functions:

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443// for adding information to the protocol debug trace
444stringstream ${ident}_transitionComment;
445#define APPEND_TRANSITION_COMMENT(str) (${ident}_transitionComment << str)
446
447/** \\brief constructor */
448$c_ident::$c_ident(const Params *p)
449 : AbstractController(p)
450{
468 m_version = p->version;
469 m_transitions_per_cycle = p->transitions_per_cycle;
470 m_buffer_size = p->buffer_size;
471 m_recycle_latency = p->recycle_latency;
472 m_number_of_TBEs = p->number_of_TBEs;
473 m_is_blocking = false;
474 m_name = "${ident}";
475''')
476 #
477 # max_port_rank is used to size vectors and thus should be one plus the
478 # largest port rank
479 #
480 max_port_rank = self.in_ports[0].pairs["max_port_rank"] + 1
481 code(' m_max_in_port_rank = $max_port_rank;')

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569 else:
570 # Normal Object
571 # added by SS
572 if "factory" in var:
573 code('$vid = ${{var["factory"]}};')
574 elif var.ident.find("mandatoryQueue") < 0:
575 th = var.get("template", "")
576 expr = "%s = new %s%s" % (vid, vtype.c_ident, th)
451 m_name = "${ident}";
452''')
453 #
454 # max_port_rank is used to size vectors and thus should be one plus the
455 # largest port rank
456 #
457 max_port_rank = self.in_ports[0].pairs["max_port_rank"] + 1
458 code(' m_max_in_port_rank = $max_port_rank;')

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546 else:
547 # Normal Object
548 # added by SS
549 if "factory" in var:
550 code('$vid = ${{var["factory"]}};')
551 elif var.ident.find("mandatoryQueue") < 0:
552 th = var.get("template", "")
553 expr = "%s = new %s%s" % (vid, vtype.c_ident, th)
577
578 args = ""
579 if "non_obj" not in vtype and not vtype.isEnumeration:
554 args = ""
555 if "non_obj" not in vtype and not vtype.isEnumeration:
580 if expr.find("TBETable") >= 0:
581 args = "m_number_of_TBEs"
582 else:
583 args = var.get("constructor_hack", "")
584
556 args = var.get("constructor", "")
585 code('$expr($args);')
586
587 code('assert($vid != NULL);')
588
589 if "default" in var:
590 code('*$vid = ${{var["default"]}}; // Object default')
591 elif "default" in vtype:
592 comment = "Type %s default" % vtype.ident

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821
822void
823$c_ident::print(ostream& out) const
824{
825 out << "[$c_ident " << m_version << "]";
826}
827
828void
557 code('$expr($args);')
558
559 code('assert($vid != NULL);')
560
561 if "default" in var:
562 code('*$vid = ${{var["default"]}}; // Object default')
563 elif "default" in vtype:
564 comment = "Type %s default" % vtype.ident

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793
794void
795$c_ident::print(ostream& out) const
796{
797 out << "[$c_ident " << m_version << "]";
798}
799
800void
829$c_ident::printConfig(ostream& out) const
830{
831 out << "$c_ident config: " << m_name << endl;
832 out << " version: " << m_version << endl;
833 map<string, string>::const_iterator it;
834 for (it = m_cfg.begin(); it != m_cfg.end(); it++)
835 out << " " << it->first << ": " << it->second << endl;
836}
837
838void
839$c_ident::printStats(ostream& out) const
840{
841''')
842 #
843 # Cache and Memory Controllers have specific profilers associated with
844 # them. Print out these stats before dumping state transition stats.
845 #
846 for param in self.config_parameters:

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802{
803''')
804 #
805 # Cache and Memory Controllers have specific profilers associated with
806 # them. Print out these stats before dumping state transition stats.
807 #
808 for param in self.config_parameters:

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