StateMachine.py (6882:898047a3672c) StateMachine.py (6888:de8e755aca4f)
1# Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
2# Copyright (c) 2009 The Hewlett-Packard Development Company
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions are
7# met: redistributions of source code must retain the above copyright
8# notice, this list of conditions and the following disclaimer;

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33
34python_class_map = {"int": "Int",
35 "string": "String",
36 "bool": "Bool",
37 "CacheMemory": "RubyCache",
38 "Sequencer": "RubySequencer",
39 "DirectoryMemory": "RubyDirectoryMemory",
40 "MemoryControl": "RubyMemoryControl",
1# Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
2# Copyright (c) 2009 The Hewlett-Packard Development Company
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions are
7# met: redistributions of source code must retain the above copyright
8# notice, this list of conditions and the following disclaimer;

--- 24 unchanged lines hidden (view full) ---

33
34python_class_map = {"int": "Int",
35 "string": "String",
36 "bool": "Bool",
37 "CacheMemory": "RubyCache",
38 "Sequencer": "RubySequencer",
39 "DirectoryMemory": "RubyDirectoryMemory",
40 "MemoryControl": "RubyMemoryControl",
41 "DMASequencer": "DMASequencer"
41 }
42
43class StateMachine(Symbol):
44 def __init__(self, symtab, ident, location, pairs, config_parameters):
45 super(StateMachine, self).__init__(symtab, ident, location, pairs)
46 self.table = None
47 self.config_parameters = config_parameters
48 for param in config_parameters:

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354 #
355 # After initializing the universal machine parameters, initialize the
356 # this machines config parameters. Also detemine if these configuration
357 # params include a sequencer. This information will be used later for
358 # contecting the sequencer back to the L1 cache controller.
359 #
360 contains_sequencer = False
361 for param in self.config_parameters:
42 }
43
44class StateMachine(Symbol):
45 def __init__(self, symtab, ident, location, pairs, config_parameters):
46 super(StateMachine, self).__init__(symtab, ident, location, pairs)
47 self.table = None
48 self.config_parameters = config_parameters
49 for param in config_parameters:

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355 #
356 # After initializing the universal machine parameters, initialize the
357 # this machines config parameters. Also detemine if these configuration
358 # params include a sequencer. This information will be used later for
359 # contecting the sequencer back to the L1 cache controller.
360 #
361 contains_sequencer = False
362 for param in self.config_parameters:
362 if param.name == "sequencer":
363 if param.name == "sequencer" or param.name == "dma_sequencer":
363 contains_sequencer = True
364 if param.pointer:
365 code('m_${{param.name}}_ptr = p->${{param.name}};')
366 else:
367 code('m_${{param.name}} = p->${{param.name}};')
368
369 #
370 # For the l1 cache controller, add the special atomic support which
371 # includes passing the sequencer a pointer to the controller.
372 #
373 if self.ident == "L1Cache":
374 if not contains_sequencer:
375 self.error("The L1Cache controller must include the sequencer " \
376 "configuration parameter")
377
378 code('''
379m_sequencer_ptr->setController(this);
380''')
364 contains_sequencer = True
365 if param.pointer:
366 code('m_${{param.name}}_ptr = p->${{param.name}};')
367 else:
368 code('m_${{param.name}} = p->${{param.name}};')
369
370 #
371 # For the l1 cache controller, add the special atomic support which
372 # includes passing the sequencer a pointer to the controller.
373 #
374 if self.ident == "L1Cache":
375 if not contains_sequencer:
376 self.error("The L1Cache controller must include the sequencer " \
377 "configuration parameter")
378
379 code('''
380m_sequencer_ptr->setController(this);
381''')
382 #
383 # For the DMA controller, pass the sequencer a pointer to the
384 # controller.
385 #
386 if self.ident == "DMA":
387 if not contains_sequencer:
388 self.error("The DMA controller must include the sequencer " \
389 "configuration parameter")
381
390
391 code('''
392m_dma_sequencer_ptr->setController(this);
393''')
394
382 code('m_num_controllers++;')
383 for var in self.objects:
384 if var.ident.find("mandatoryQueue") >= 0:
385 code('m_${{var.c_ident}}_ptr = new ${{var.type.c_ident}}();')
386
387 code.dedent()
388 code('''
389}

--- 705 unchanged lines hidden --- 		395 code('m_num_controllers++;')
396 for var in self.objects:
397 if var.ident.find("mandatoryQueue") >= 0:
398 code('m_${{var.c_ident}}_ptr = new ${{var.type.c_ident}}();')
399
400 code.dedent()
401 code('''
402}

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