simple_mem.hh (9264:1607119c36bb) simple_mem.hh (9294:8fb03b13de02)
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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120
121 public:
122
123 SimpleMemory(const SimpleMemoryParams *p);
124 virtual ~SimpleMemory() { }
125
126 unsigned int drain(Event* de);
127
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 111 unchanged lines hidden (view full) ---

120
121 public:
122
123 SimpleMemory(const SimpleMemoryParams *p);
124 virtual ~SimpleMemory() { }
125
126 unsigned int drain(Event* de);
127
128 virtual SlavePort& getSlavePort(const std::string& if_name, int idx = -1);
128 virtual BaseSlavePort& getSlavePort(const std::string& if_name,
129 PortID idx = InvalidPortID);
129 virtual void init();
130
131 protected:
132
133 Tick doAtomicAccess(PacketPtr pkt);
134 void doFunctionalAccess(PacketPtr pkt);
135 bool recvTimingReq(PacketPtr pkt);
136 Tick calculateLatency(PacketPtr pkt);
137
138};
139
140#endif //__SIMPLE_MEMORY_HH__
130 virtual void init();
131
132 protected:
133
134 Tick doAtomicAccess(PacketPtr pkt);
135 void doFunctionalAccess(PacketPtr pkt);
136 bool recvTimingReq(PacketPtr pkt);
137 Tick calculateLatency(PacketPtr pkt);
138
139};
140
141#endif //__SIMPLE_MEMORY_HH__