simple_mem.hh (9228:bbdca4088834) simple_mem.hh (9264:1607119c36bb)
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 44 unchanged lines hidden (view full) ---

53#include "mem/tport.hh"
54#include "params/SimpleMemory.hh"
55
56/**
57 * The simple memory is a basic single-ported memory controller with
58 * an configurable throughput and latency, potentially with a variance
59 * added to the latter. It uses a QueueSlavePort to avoid dealing with
60 * the flow control of sending responses.
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 44 unchanged lines hidden (view full) ---

53#include "mem/tport.hh"
54#include "params/SimpleMemory.hh"
55
56/**
57 * The simple memory is a basic single-ported memory controller with
58 * an configurable throughput and latency, potentially with a variance
59 * added to the latter. It uses a QueueSlavePort to avoid dealing with
60 * the flow control of sending responses.
61 * @sa \ref gem5MemorySystem "gem5 Memory System"
61 */
62class SimpleMemory : public AbstractMemory
63{
64
65 private:
66
67 class MemoryPort : public QueuedSlavePort
68 {

--- 71 unchanged lines hidden --- 		62 */
63class SimpleMemory : public AbstractMemory
64{
65
66 private:
67
68 class MemoryPort : public QueuedSlavePort
69 {

--- 71 unchanged lines hidden ---