| simple_mem.hh (11168:f98eb2da15a4) | simple_mem.hh (11169:44b5c183c3cd) |
|---|---|
| 1/* 2 * Copyright (c) 2012-2013 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 174 unchanged lines hidden (view full) --- 183 184 public: 185 186 SimpleMemory(const SimpleMemoryParams *p); 187 188 DrainState drain() override; 189 190 BaseSlavePort& getSlavePort(const std::string& if_name, | 1/* 2 * Copyright (c) 2012-2013 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 174 unchanged lines hidden (view full) --- 183 184 public: 185 186 SimpleMemory(const SimpleMemoryParams *p); 187 188 DrainState drain() override; 189 190 BaseSlavePort& getSlavePort(const std::string& if_name, |
| 191 PortID idx = InvalidPortID); 192 void init(); | 191 PortID idx = InvalidPortID) override; 192 void init() override; |
| 193 194 protected: 195 196 Tick recvAtomic(PacketPtr pkt); 197 198 void recvFunctional(PacketPtr pkt); 199 200 bool recvTimingReq(PacketPtr pkt); 201 202 void recvRespRetry(); 203 204}; 205 206#endif //__SIMPLE_MEMORY_HH__ | 193 194 protected: 195 196 Tick recvAtomic(PacketPtr pkt); 197 198 void recvFunctional(PacketPtr pkt); 199 200 bool recvTimingReq(PacketPtr pkt); 201 202 void recvRespRetry(); 203 204}; 205 206#endif //__SIMPLE_MEMORY_HH__ |