simple_mem.cc (9090:e4e22240398f) | simple_mem.cc (9120:48eeef8a0997) |
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1/* 2 * Copyright (c) 2010-2012 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 35 unchanged lines hidden (view full) --- 44 45#include "base/random.hh" 46#include "mem/simple_mem.hh" 47 48using namespace std; 49 50SimpleMemory::SimpleMemory(const Params* p) : 51 AbstractMemory(p), | 1/* 2 * Copyright (c) 2010-2012 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 35 unchanged lines hidden (view full) --- 44 45#include "base/random.hh" 46#include "mem/simple_mem.hh" 47 48using namespace std; 49 50SimpleMemory::SimpleMemory(const Params* p) : 51 AbstractMemory(p), |
52 lat(p->latency), lat_var(p->latency_var) | 52 port(name() + ".port", *this), lat(p->latency), lat_var(p->latency_var) |
53{ | 53{ |
54 for (size_t i = 0; i < p->port_port_connection_count; ++i) { 55 ports.push_back(new MemoryPort(csprintf("%s-port-%d", name(), i), 56 *this)); 57 } | |
58} 59 60void 61SimpleMemory::init() 62{ | 54} 55 56void 57SimpleMemory::init() 58{ |
63 for (vector<MemoryPort*>::iterator p = ports.begin(); p != ports.end(); 64 ++p) { 65 if (!(*p)->isConnected()) { 66 fatal("SimpleMemory port %s is unconnected!\n", (*p)->name()); 67 } else { 68 (*p)->sendRangeChange(); 69 } | 59 // allow unconnected memories as this is used in several ruby 60 // systems at the moment 61 if (port.isConnected()) { 62 port.sendRangeChange(); |
70 } 71} 72 73Tick 74SimpleMemory::calculateLatency(PacketPtr pkt) 75{ 76 if (pkt->memInhibitAsserted()) { 77 return 0; --- 19 unchanged lines hidden (view full) --- 97} 98 99SlavePort & 100SimpleMemory::getSlavePort(const std::string &if_name, int idx) 101{ 102 if (if_name != "port") { 103 return MemObject::getSlavePort(if_name, idx); 104 } else { | 63 } 64} 65 66Tick 67SimpleMemory::calculateLatency(PacketPtr pkt) 68{ 69 if (pkt->memInhibitAsserted()) { 70 return 0; --- 19 unchanged lines hidden (view full) --- 90} 91 92SlavePort & 93SimpleMemory::getSlavePort(const std::string &if_name, int idx) 94{ 95 if (if_name != "port") { 96 return MemObject::getSlavePort(if_name, idx); 97 } else { |
105 if (idx >= static_cast<int>(ports.size())) { 106 fatal("SimpleMemory::getSlavePort: unknown index %d\n", idx); 107 } 108 109 return *ports[idx]; | 98 return port; |
110 } 111} 112 113unsigned int 114SimpleMemory::drain(Event *de) 115{ | 99 } 100} 101 102unsigned int 103SimpleMemory::drain(Event *de) 104{ |
116 int count = 0; 117 for (vector<MemoryPort*>::iterator p = ports.begin(); p != ports.end(); 118 ++p) { 119 count += (*p)->drain(de); 120 } | 105 int count = port.drain(de); |
121 122 if (count) 123 changeState(Draining); 124 else 125 changeState(Drained); 126 return count; 127} 128 --- 39 unchanged lines hidden --- | 106 107 if (count) 108 changeState(Draining); 109 else 110 changeState(Drained); 111 return count; 112} 113 --- 39 unchanged lines hidden --- |