1/* |
2 * Copyright (c) 2010-2013 ARM Limited |
3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated --- 33 unchanged lines hidden (view full) --- 44 45#include "base/random.hh" 46#include "mem/simple_mem.hh" 47 48using namespace std; 49 50SimpleMemory::SimpleMemory(const SimpleMemoryParams* p) : 51 AbstractMemory(p), |
52 port(name() + ".port", *this), latency(p->latency), 53 latency_var(p->latency_var), bandwidth(p->bandwidth), isBusy(false), 54 retryReq(false), retryResp(false), 55 releaseEvent(this), dequeueEvent(this), drainManager(NULL) |
56{ 57} 58 59void 60SimpleMemory::init() 61{ 62 // allow unconnected memories as this is used in several ruby 63 // systems at the moment 64 if (port.isConnected()) { 65 port.sendRangeChange(); 66 } 67} 68 69Tick |
70SimpleMemory::recvAtomic(PacketPtr pkt) |
71{ |
72 access(pkt); |
73 return pkt->memInhibitAsserted() ? 0 : getLatency(); |
74} 75 76void |
77SimpleMemory::recvFunctional(PacketPtr pkt) |
78{ |
79 pkt->pushLabel(name()); 80 |
81 functionalAccess(pkt); |
82 83 // potentially update the packets in our packet queue as well 84 for (auto i = packetQueue.begin(); i != packetQueue.end(); ++i) 85 pkt->checkFunctional(i->pkt); 86 87 pkt->popLabel(); |
88} 89 90bool 91SimpleMemory::recvTimingReq(PacketPtr pkt) 92{ 93 /// @todo temporary hack to deal with memory corruption issues until 94 /// 4-phase transactions are complete 95 for (int x = 0; x < pendingDelete.size(); x++) --- 44 unchanged lines hidden (view full) --- 140 schedule(releaseEvent, curTick() + duration); 141 isBusy = true; 142 } 143 } 144 145 // go ahead and deal with the packet and put the response in the 146 // queue if there is one 147 bool needsResponse = pkt->needsResponse(); |
148 recvAtomic(pkt); |
149 // turn packet around to go back to requester if response expected 150 if (needsResponse) { |
151 // recvAtomic() should already have turned packet into |
152 // atomic response 153 assert(pkt->isResponse()); |
154 // to keep things simple (and in order), we put the packet at 155 // the end even if the latency suggests it should be sent 156 // before the packet(s) before it 157 packetQueue.push_back(DeferredPacket(pkt, curTick() + getLatency())); 158 if (!dequeueEvent.scheduled()) 159 schedule(dequeueEvent, packetQueue.back().tick); |
160 } else { 161 pendingDelete.push_back(pkt); 162 } 163 164 return true; 165} 166 167void 168SimpleMemory::release() 169{ 170 assert(isBusy); 171 isBusy = false; 172 if (retryReq) { 173 retryReq = false; 174 port.sendRetry(); 175 } 176} 177 |
178void 179SimpleMemory::dequeue() 180{ 181 assert(!packetQueue.empty()); 182 DeferredPacket deferred_pkt = packetQueue.front(); 183 184 retryResp = !port.sendTimingResp(deferred_pkt.pkt); 185 186 if (!retryResp) { 187 packetQueue.pop_front(); 188 189 // if the queue is not empty, schedule the next dequeue event, 190 // otherwise signal that we are drained if we were asked to do so 191 if (!packetQueue.empty()) { 192 // if there were packets that got in-between then we 193 // already have an event scheduled, so use re-schedule 194 reschedule(dequeueEvent, 195 std::max(packetQueue.front().tick, curTick()), true); 196 } else if (drainManager) { 197 drainManager->signalDrainDone(); 198 drainManager = NULL; 199 } 200 } 201} 202 203Tick 204SimpleMemory::getLatency() const 205{ 206 return latency + 207 (latency_var ? random_mt.random<Tick>(0, latency_var) : 0); 208} 209 210void 211SimpleMemory::recvRetry() 212{ 213 assert(retryResp); 214 215 dequeue(); 216} 217 |
218BaseSlavePort & 219SimpleMemory::getSlavePort(const std::string &if_name, PortID idx) 220{ 221 if (if_name != "port") { 222 return MemObject::getSlavePort(if_name, idx); 223 } else { 224 return port; 225 } 226} 227 228unsigned int 229SimpleMemory::drain(DrainManager *dm) 230{ |
231 int count = 0; |
232 |
233 // also track our internal queue 234 if (!packetQueue.empty()) { 235 count += 1; 236 drainManager = dm; 237 } 238 |
239 if (count) 240 setDrainState(Drainable::Draining); 241 else 242 setDrainState(Drainable::Drained); 243 return count; 244} 245 246SimpleMemory::MemoryPort::MemoryPort(const std::string& _name, 247 SimpleMemory& _memory) |
248 : SlavePort(_name, &_memory), memory(_memory) |
249{ } 250 251AddrRangeList 252SimpleMemory::MemoryPort::getAddrRanges() const 253{ 254 AddrRangeList ranges; 255 ranges.push_back(memory.getAddrRange()); 256 return ranges; 257} 258 259Tick 260SimpleMemory::MemoryPort::recvAtomic(PacketPtr pkt) 261{ |
262 return memory.recvAtomic(pkt); |
263} 264 265void 266SimpleMemory::MemoryPort::recvFunctional(PacketPtr pkt) 267{ |
268 memory.recvFunctional(pkt); |
269} 270 271bool 272SimpleMemory::MemoryPort::recvTimingReq(PacketPtr pkt) 273{ 274 return memory.recvTimingReq(pkt); 275} 276 |
277void 278SimpleMemory::MemoryPort::recvRetry() 279{ 280 memory.recvRetry(); 281} 282 |
283SimpleMemory* 284SimpleMemoryParams::create() 285{ 286 return new SimpleMemory(this); 287} |