Sequencer.hh (9501:378817542866) Sequencer.hh (9507:d2ab6d889fc7)
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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65
66 // Public Methods
67 void wakeup(); // Used only for deadlock detection
68
69 void printProgress(std::ostream& out) const;
70
71 void writeCallback(const Address& address, DataBlock& data);
72
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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65
66 // Public Methods
67 void wakeup(); // Used only for deadlock detection
68
69 void printProgress(std::ostream& out) const;
70
71 void writeCallback(const Address& address, DataBlock& data);
72
73 void writeCallback(const Address& address,
74 GenericMachineType mach,
73 void writeCallback(const Address& address,
74 GenericMachineType mach,
75 DataBlock& data);
76
75 DataBlock& data);
76
77 void writeCallback(const Address& address,
78 GenericMachineType mach,
77 void writeCallback(const Address& address,
78 GenericMachineType mach,
79 DataBlock& data,
79 DataBlock& data,
80 Time initialRequestTime,
81 Time forwardRequestTime,
82 Time firstResponseTime);
80 Cycles initialRequestTime,
81 Cycles forwardRequestTime,
82 Cycles firstResponseTime);
83
84 void readCallback(const Address& address, DataBlock& data);
85
83
84 void readCallback(const Address& address, DataBlock& data);
85
86 void readCallback(const Address& address,
87 GenericMachineType mach,
86 void readCallback(const Address& address,
87 GenericMachineType mach,
88 DataBlock& data);
89
88 DataBlock& data);
89
90 void readCallback(const Address& address,
91 GenericMachineType mach,
90 void readCallback(const Address& address,
91 GenericMachineType mach,
92 DataBlock& data,
92 DataBlock& data,
93 Time initialRequestTime,
94 Time forwardRequestTime,
95 Time firstResponseTime);
93 Cycles initialRequestTime,
94 Cycles forwardRequestTime,
95 Cycles firstResponseTime);
96
97 RequestStatus makeRequest(PacketPtr pkt);
98 bool empty() const;
99 int outstandingCount() const { return m_outstanding_count; }
100 bool
101 isDeadlockEventScheduled() const
102 {
103 return deadlockCheckEvent.scheduled();

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117 void removeRequest(SequencerRequest* request);
118 void evictionCallback(const Address& address);
119
120 void recordRequestType(SequencerRequestType requestType);
121
122 private:
123 void issueRequest(PacketPtr pkt, RubyRequestType type);
124
96
97 RequestStatus makeRequest(PacketPtr pkt);
98 bool empty() const;
99 int outstandingCount() const { return m_outstanding_count; }
100 bool
101 isDeadlockEventScheduled() const
102 {
103 return deadlockCheckEvent.scheduled();

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117 void removeRequest(SequencerRequest* request);
118 void evictionCallback(const Address& address);
119
120 void recordRequestType(SequencerRequestType requestType);
121
122 private:
123 void issueRequest(PacketPtr pkt, RubyRequestType type);
124
125 void hitCallback(SequencerRequest* request,
125 void hitCallback(SequencerRequest* request,
126 GenericMachineType mach,
127 DataBlock& data,
128 bool success,
126 GenericMachineType mach,
127 DataBlock& data,
128 bool success,
129 Time initialRequestTime,
130 Time forwardRequestTime,
131 Time firstResponseTime);
129 Cycles initialRequestTime,
130 Cycles forwardRequestTime,
131 Cycles firstResponseTime);
132
133 RequestStatus insertRequest(PacketPtr pkt, RubyRequestType request_type);
134
135 bool handleLlsc(const Address& address, SequencerRequest* request);
136
137 // Private copy constructor and assignment operator
138 Sequencer(const Sequencer& obj);
139 Sequencer& operator=(const Sequencer& obj);

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147
148 typedef m5::hash_map<Address, SequencerRequest*> RequestTable;
149 RequestTable m_writeRequestTable;
150 RequestTable m_readRequestTable;
151 // Global outstanding request count, across all request tables
152 int m_outstanding_count;
153 bool m_deadlock_check_scheduled;
154
132
133 RequestStatus insertRequest(PacketPtr pkt, RubyRequestType request_type);
134
135 bool handleLlsc(const Address& address, SequencerRequest* request);
136
137 // Private copy constructor and assignment operator
138 Sequencer(const Sequencer& obj);
139 Sequencer& operator=(const Sequencer& obj);

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147
148 typedef m5::hash_map<Address, SequencerRequest*> RequestTable;
149 RequestTable m_writeRequestTable;
150 RequestTable m_readRequestTable;
151 // Global outstanding request count, across all request tables
152 int m_outstanding_count;
153 bool m_deadlock_check_scheduled;
154
155 int m_store_waiting_on_load_cycles;
156 int m_store_waiting_on_store_cycles;
157 int m_load_waiting_on_store_cycles;
158 int m_load_waiting_on_load_cycles;
155 uint32_t m_store_waiting_on_load_cycles;
156 uint32_t m_store_waiting_on_store_cycles;
157 uint32_t m_load_waiting_on_store_cycles;
158 uint32_t m_load_waiting_on_load_cycles;
159
160 bool m_usingNetworkTester;
161
162 class SequencerWakeupEvent : public Event
163 {
164 private:
165 Sequencer *m_sequencer_ptr;
166

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160 bool m_usingNetworkTester;
161
162 class SequencerWakeupEvent : public Event
163 {
164 private:
165 Sequencer *m_sequencer_ptr;
166

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