Sequencer.hh (8615:e66a566f2cfa) Sequencer.hh (8688:5ca9dd977386)
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 25 unchanged lines hidden (view full) ---

34#include "base/hashmap.hh"
35#include "mem/protocol/GenericMachineType.hh"
36#include "mem/protocol/RubyRequestType.hh"
37#include "mem/ruby/common/Address.hh"
38#include "mem/ruby/common/Consumer.hh"
39#include "mem/ruby/system/RubyPort.hh"
40
41class DataBlock;
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 25 unchanged lines hidden (view full) ---

34#include "base/hashmap.hh"
35#include "mem/protocol/GenericMachineType.hh"
36#include "mem/protocol/RubyRequestType.hh"
37#include "mem/ruby/common/Address.hh"
38#include "mem/ruby/common/Consumer.hh"
39#include "mem/ruby/system/RubyPort.hh"
40
41class DataBlock;
42class CacheMsg;
43class MachineID;
44class CacheMemory;
45
46class RubySequencerParams;
47
48struct SequencerRequest
49{
50 PacketPtr pkt;
51 RubyRequestType m_type;

--- 43 unchanged lines hidden (view full) ---

95 GenericMachineType mach,
96 DataBlock& data,
97 Time initialRequestTime,
98 Time forwardRequestTime,
99 Time firstResponseTime);
100
101 RequestStatus makeRequest(PacketPtr pkt);
102 bool empty() const;
42class CacheMemory;
43
44class RubySequencerParams;
45
46struct SequencerRequest
47{
48 PacketPtr pkt;
49 RubyRequestType m_type;

--- 43 unchanged lines hidden (view full) ---

93 GenericMachineType mach,
94 DataBlock& data,
95 Time initialRequestTime,
96 Time forwardRequestTime,
97 Time firstResponseTime);
98
99 RequestStatus makeRequest(PacketPtr pkt);
100 bool empty() const;
101 int outstandingCount() const { return m_outstanding_count; }
102 bool
103 isDeadlockEventScheduled() const
104 {
105 return deadlockCheckEvent.scheduled();
106 }
103
107
108 void
109 descheduleDeadlockEvent()
110 {
111 deschedule(deadlockCheckEvent);
112 }
113
104 void print(std::ostream& out) const;
105 void printStats(std::ostream& out) const;
106 void checkCoherence(const Address& address);
107
108 void markRemoved();
109 void removeRequest(SequencerRequest* request);
110
111 private:

--- 63 unchanged lines hidden --- 		114 void print(std::ostream& out) const;
115 void printStats(std::ostream& out) const;
116 void checkCoherence(const Address& address);
117
118 void markRemoved();
119 void removeRequest(SequencerRequest* request);
120
121 private:

--- 63 unchanged lines hidden ---