Sequencer.hh (7055:4e24742201d7) Sequencer.hh (7455:586f99bf0dc4)
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef __MEM_RUBY_SYSTEM_SEQUENCER_HH__
30#define __MEM_RUBY_SYSTEM_SEQUENCER_HH__
31
32#include <iostream>
33
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef __MEM_RUBY_SYSTEM_SEQUENCER_HH__
30#define __MEM_RUBY_SYSTEM_SEQUENCER_HH__
31
32#include <iostream>
33
34#include "mem/gems_common/Map.hh"
34#include "base/hashmap.hh"
35#include "mem/protocol/AccessModeType.hh"
36#include "mem/protocol/CacheRequestType.hh"
37#include "mem/protocol/GenericMachineType.hh"
38#include "mem/protocol/PrefetchBit.hh"
39#include "mem/ruby/common/Address.hh"
40#include "mem/ruby/common/Consumer.hh"
41#include "mem/ruby/common/Global.hh"
42#include "mem/ruby/system/RubyPort.hh"

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80 RequestStatus makeRequest(const RubyRequest & request);
81 RequestStatus getRequestStatus(const RubyRequest& request);
82 bool empty() const;
83
84 void print(std::ostream& out) const;
85 void printStats(std::ostream& out) const;
86 void checkCoherence(const Address& address);
87
35#include "mem/protocol/AccessModeType.hh"
36#include "mem/protocol/CacheRequestType.hh"
37#include "mem/protocol/GenericMachineType.hh"
38#include "mem/protocol/PrefetchBit.hh"
39#include "mem/ruby/common/Address.hh"
40#include "mem/ruby/common/Consumer.hh"
41#include "mem/ruby/common/Global.hh"
42#include "mem/ruby/system/RubyPort.hh"

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80 RequestStatus makeRequest(const RubyRequest & request);
81 RequestStatus getRequestStatus(const RubyRequest& request);
82 bool empty() const;
83
84 void print(std::ostream& out) const;
85 void printStats(std::ostream& out) const;
86 void checkCoherence(const Address& address);
87
88 void markRemoved();
88 void removeRequest(SequencerRequest* request);
89
90 private:
91 bool tryCacheAccess(const Address& addr, CacheRequestType type,
92 const Address& pc, AccessModeType access_mode,
93 int size, DataBlock*& data_ptr);
94 void issueRequest(const RubyRequest& request);
95

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103
104 private:
105 int m_max_outstanding_requests;
106 int m_deadlock_threshold;
107
108 CacheMemory* m_dataCache_ptr;
109 CacheMemory* m_instCache_ptr;
110
89 void removeRequest(SequencerRequest* request);
90
91 private:
92 bool tryCacheAccess(const Address& addr, CacheRequestType type,
93 const Address& pc, AccessModeType access_mode,
94 int size, DataBlock*& data_ptr);
95 void issueRequest(const RubyRequest& request);
96

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104
105 private:
106 int m_max_outstanding_requests;
107 int m_deadlock_threshold;
108
109 CacheMemory* m_dataCache_ptr;
110 CacheMemory* m_instCache_ptr;
111
111 Map<Address, SequencerRequest*> m_writeRequestTable;
112 Map<Address, SequencerRequest*> m_readRequestTable;
112 typedef m5::hash_map<Address, SequencerRequest*> RequestTable;
113 RequestTable m_writeRequestTable;
114 RequestTable m_readRequestTable;
113 // Global outstanding request count, across all request tables
114 int m_outstanding_count;
115 bool m_deadlock_check_scheduled;
116
117 int m_store_waiting_on_load_cycles;
118 int m_store_waiting_on_store_cycles;
119 int m_load_waiting_on_store_cycles;
120 int m_load_waiting_on_load_cycles;

--- 27 unchanged lines hidden --- 		115 // Global outstanding request count, across all request tables
116 int m_outstanding_count;
117 bool m_deadlock_check_scheduled;
118
119 int m_store_waiting_on_load_cycles;
120 int m_store_waiting_on_store_cycles;
121 int m_load_waiting_on_store_cycles;
122 int m_load_waiting_on_load_cycles;

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