Sequencer.hh (6372:f1a41ea3bbab) | Sequencer.hh (6505:a2306c563df2) |
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1 2/* 3 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 70 unchanged lines hidden (view full) --- 79 80 void printProgress(ostream& out) const; 81 82 void writeCallback(const Address& address, DataBlock& data); 83 void readCallback(const Address& address, DataBlock& data); 84 85 // called by Tester or Simics 86 int64_t makeRequest(const RubyRequest & request); | 1 2/* 3 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 70 unchanged lines hidden (view full) --- 79 80 void printProgress(ostream& out) const; 81 82 void writeCallback(const Address& address, DataBlock& data); 83 void readCallback(const Address& address, DataBlock& data); 84 85 // called by Tester or Simics 86 int64_t makeRequest(const RubyRequest & request); |
87 bool isReady(const RubyRequest& request) const; | 87 bool isReady(const RubyRequest& request); |
88 bool empty() const; 89 90 void print(ostream& out) const; 91 void checkCoherence(const Address& address); 92 93 // bool getRubyMemoryValue(const Address& addr, char* value, unsigned int size_in_bytes); 94 // bool setRubyMemoryValue(const Address& addr, char *value, unsigned int size_in_bytes); 95 --- 24 unchanged lines hidden (view full) --- 120 int m_version; 121 int m_controller_type; 122 123 Map<Address, SequencerRequest*> m_writeRequestTable; 124 Map<Address, SequencerRequest*> m_readRequestTable; 125 // Global outstanding request count, across all request tables 126 int m_outstanding_count; 127 bool m_deadlock_check_scheduled; | 88 bool empty() const; 89 90 void print(ostream& out) const; 91 void checkCoherence(const Address& address); 92 93 // bool getRubyMemoryValue(const Address& addr, char* value, unsigned int size_in_bytes); 94 // bool setRubyMemoryValue(const Address& addr, char *value, unsigned int size_in_bytes); 95 --- 24 unchanged lines hidden (view full) --- 120 int m_version; 121 int m_controller_type; 122 123 Map<Address, SequencerRequest*> m_writeRequestTable; 124 Map<Address, SequencerRequest*> m_readRequestTable; 125 // Global outstanding request count, across all request tables 126 int m_outstanding_count; 127 bool m_deadlock_check_scheduled; |
128 | 128 int m_servicing_atomic; 129 int m_atomics_counter; |
129}; 130 131// Output operator declaration 132ostream& operator<<(ostream& out, const Sequencer& obj); 133 134// ******************* Definitions ******************* 135 136// Output operator definition 137extern inline 138ostream& operator<<(ostream& out, const Sequencer& obj) 139{ 140 obj.print(out); 141 out << flush; 142 return out; 143} 144 145#endif //SEQUENCER_H 146 | 130}; 131 132// Output operator declaration 133ostream& operator<<(ostream& out, const Sequencer& obj); 134 135// ******************* Definitions ******************* 136 137// Output operator definition 138extern inline 139ostream& operator<<(ostream& out, const Sequencer& obj) 140{ 141 obj.print(out); 142 out << flush; 143 return out; 144} 145 146#endif //SEQUENCER_H 147 |