1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef __MEM_RUBY_SYSTEM_SEQUENCER_HH__
30#define __MEM_RUBY_SYSTEM_SEQUENCER_HH__
31
32#include <iostream>
33
34#include "base/hashmap.hh"
35#include "mem/protocol/GenericMachineType.hh"
| 1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef __MEM_RUBY_SYSTEM_SEQUENCER_HH__
30#define __MEM_RUBY_SYSTEM_SEQUENCER_HH__
31
32#include <iostream>
33
34#include "base/hashmap.hh"
35#include "mem/protocol/GenericMachineType.hh"
|
36#include "mem/protocol/PrefetchBit.hh"
37#include "mem/protocol/RubyAccessMode.hh"
| |
38#include "mem/protocol/RubyRequestType.hh"
39#include "mem/ruby/common/Address.hh"
40#include "mem/ruby/common/Consumer.hh"
| 36#include "mem/protocol/RubyRequestType.hh"
37#include "mem/ruby/common/Address.hh"
38#include "mem/ruby/common/Consumer.hh"
|
41#include "mem/ruby/common/Global.hh"
| |
42#include "mem/ruby/system/RubyPort.hh"
43
44class DataBlock;
45class CacheMsg;
46class MachineID;
47class CacheMemory;
48
49class RubySequencerParams;
50
51struct SequencerRequest
52{
| 39#include "mem/ruby/system/RubyPort.hh"
40
41class DataBlock;
42class CacheMsg;
43class MachineID;
44class CacheMemory;
45
46class RubySequencerParams;
47
48struct SequencerRequest
49{
|
53 RubyRequest ruby_request;
| 50 PacketPtr pkt;
51 RubyRequestType m_type;
|
54 Time issue_time;
55
| 52 Time issue_time;
53
|
56 SequencerRequest(const RubyRequest & _ruby_request, Time _issue_time)
57 : ruby_request(_ruby_request), issue_time(_issue_time)
| 54 SequencerRequest(PacketPtr _pkt, RubyRequestType _m_type, Time _issue_time)
55 : pkt(_pkt), m_type(_m_type), issue_time(_issue_time)
|
58 {}
59};
60
61std::ostream& operator<<(std::ostream& out, const SequencerRequest& obj);
62
63class Sequencer : public RubyPort, public Consumer
64{
65 public:
66 typedef RubySequencerParams Params;
67 Sequencer(const Params *);
68 ~Sequencer();
69
70 // Public Methods
71 void wakeup(); // Used only for deadlock detection
72
73 void printConfig(std::ostream& out) const;
74
75 void printProgress(std::ostream& out) const;
76
77 void writeCallback(const Address& address, DataBlock& data);
78
79 void writeCallback(const Address& address,
80 GenericMachineType mach,
81 DataBlock& data);
82
83 void writeCallback(const Address& address,
84 GenericMachineType mach,
85 DataBlock& data,
86 Time initialRequestTime,
87 Time forwardRequestTime,
88 Time firstResponseTime);
89
90 void readCallback(const Address& address, DataBlock& data);
91
92 void readCallback(const Address& address,
93 GenericMachineType mach,
94 DataBlock& data);
95
96 void readCallback(const Address& address,
97 GenericMachineType mach,
98 DataBlock& data,
99 Time initialRequestTime,
100 Time forwardRequestTime,
101 Time firstResponseTime);
102
| 56 {}
57};
58
59std::ostream& operator<<(std::ostream& out, const SequencerRequest& obj);
60
61class Sequencer : public RubyPort, public Consumer
62{
63 public:
64 typedef RubySequencerParams Params;
65 Sequencer(const Params *);
66 ~Sequencer();
67
68 // Public Methods
69 void wakeup(); // Used only for deadlock detection
70
71 void printConfig(std::ostream& out) const;
72
73 void printProgress(std::ostream& out) const;
74
75 void writeCallback(const Address& address, DataBlock& data);
76
77 void writeCallback(const Address& address,
78 GenericMachineType mach,
79 DataBlock& data);
80
81 void writeCallback(const Address& address,
82 GenericMachineType mach,
83 DataBlock& data,
84 Time initialRequestTime,
85 Time forwardRequestTime,
86 Time firstResponseTime);
87
88 void readCallback(const Address& address, DataBlock& data);
89
90 void readCallback(const Address& address,
91 GenericMachineType mach,
92 DataBlock& data);
93
94 void readCallback(const Address& address,
95 GenericMachineType mach,
96 DataBlock& data,
97 Time initialRequestTime,
98 Time forwardRequestTime,
99 Time firstResponseTime);
100
|
103 RequestStatus makeRequest(const RubyRequest & request);
104 RequestStatus getRequestStatus(const RubyRequest& request);
| 101 RequestStatus makeRequest(PacketPtr pkt);
|
105 bool empty() const;
106
107 void print(std::ostream& out) const;
108 void printStats(std::ostream& out) const;
109 void checkCoherence(const Address& address);
110
111 void markRemoved();
112 void removeRequest(SequencerRequest* request);
113
114 private:
| 102 bool empty() const;
103
104 void print(std::ostream& out) const;
105 void printStats(std::ostream& out) const;
106 void checkCoherence(const Address& address);
107
108 void markRemoved();
109 void removeRequest(SequencerRequest* request);
110
111 private:
|
115 void issueRequest(const RubyRequest& request);
| 112 void issueRequest(PacketPtr pkt, RubyRequestType type);
|
116
117 void hitCallback(SequencerRequest* request,
118 GenericMachineType mach,
119 DataBlock& data,
120 bool success,
121 Time initialRequestTime,
122 Time forwardRequestTime,
123 Time firstResponseTime);
124
| 113
114 void hitCallback(SequencerRequest* request,
115 GenericMachineType mach,
116 DataBlock& data,
117 bool success,
118 Time initialRequestTime,
119 Time forwardRequestTime,
120 Time firstResponseTime);
121
|
125 bool insertRequest(SequencerRequest* request);
| 122 RequestStatus insertRequest(PacketPtr pkt, RubyRequestType request_type);
|
126
127 bool handleLlsc(const Address& address, SequencerRequest* request);
128
129 // Private copy constructor and assignment operator
130 Sequencer(const Sequencer& obj);
131 Sequencer& operator=(const Sequencer& obj);
132
133 private:
134 int m_max_outstanding_requests;
135 int m_deadlock_threshold;
136
137 CacheMemory* m_dataCache_ptr;
138 CacheMemory* m_instCache_ptr;
139
140 typedef m5::hash_map<Address, SequencerRequest*> RequestTable;
141 RequestTable m_writeRequestTable;
142 RequestTable m_readRequestTable;
143 // Global outstanding request count, across all request tables
144 int m_outstanding_count;
145 bool m_deadlock_check_scheduled;
146
147 int m_store_waiting_on_load_cycles;
148 int m_store_waiting_on_store_cycles;
149 int m_load_waiting_on_store_cycles;
150 int m_load_waiting_on_load_cycles;
151
152 bool m_usingNetworkTester;
153
154 class SequencerWakeupEvent : public Event
155 {
156 private:
157 Sequencer *m_sequencer_ptr;
158
159 public:
160 SequencerWakeupEvent(Sequencer *_seq) : m_sequencer_ptr(_seq) {}
161 void process() { m_sequencer_ptr->wakeup(); }
162 const char *description() const { return "Sequencer deadlock check"; }
163 };
164
165 SequencerWakeupEvent deadlockCheckEvent;
166};
167
168inline std::ostream&
169operator<<(std::ostream& out, const Sequencer& obj)
170{
171 obj.print(out);
172 out << std::flush;
173 return out;
174}
175
176#endif // __MEM_RUBY_SYSTEM_SEQUENCER_HH__
177
| 123
124 bool handleLlsc(const Address& address, SequencerRequest* request);
125
126 // Private copy constructor and assignment operator
127 Sequencer(const Sequencer& obj);
128 Sequencer& operator=(const Sequencer& obj);
129
130 private:
131 int m_max_outstanding_requests;
132 int m_deadlock_threshold;
133
134 CacheMemory* m_dataCache_ptr;
135 CacheMemory* m_instCache_ptr;
136
137 typedef m5::hash_map<Address, SequencerRequest*> RequestTable;
138 RequestTable m_writeRequestTable;
139 RequestTable m_readRequestTable;
140 // Global outstanding request count, across all request tables
141 int m_outstanding_count;
142 bool m_deadlock_check_scheduled;
143
144 int m_store_waiting_on_load_cycles;
145 int m_store_waiting_on_store_cycles;
146 int m_load_waiting_on_store_cycles;
147 int m_load_waiting_on_load_cycles;
148
149 bool m_usingNetworkTester;
150
151 class SequencerWakeupEvent : public Event
152 {
153 private:
154 Sequencer *m_sequencer_ptr;
155
156 public:
157 SequencerWakeupEvent(Sequencer *_seq) : m_sequencer_ptr(_seq) {}
158 void process() { m_sequencer_ptr->wakeup(); }
159 const char *description() const { return "Sequencer deadlock check"; }
160 };
161
162 SequencerWakeupEvent deadlockCheckEvent;
163};
164
165inline std::ostream&
166operator<<(std::ostream& out, const Sequencer& obj)
167{
168 obj.print(out);
169 out << std::flush;
170 return out;
171}
172
173#endif // __MEM_RUBY_SYSTEM_SEQUENCER_HH__
174
|