Sequencer.cc (9773:915be89faf30) Sequencer.cc (10012:ec5a5bfb941d)
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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50
51Sequencer *
52RubySequencerParams::create()
53{
54 return new Sequencer(this);
55}
56
57Sequencer::Sequencer(const Params *p)
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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50
51Sequencer *
52RubySequencerParams::create()
53{
54 return new Sequencer(this);
55}
56
57Sequencer::Sequencer(const Params *p)
58 : RubyPort(p), deadlockCheckEvent(this)
58 : RubyPort(p), m_IncompleteTimes(MachineType_NUM), deadlockCheckEvent(this)
59{
59{
60 m_store_waiting_on_load_cycles = 0;
61 m_store_waiting_on_store_cycles = 0;
62 m_load_waiting_on_store_cycles = 0;
63 m_load_waiting_on_load_cycles = 0;
64
65 m_outstanding_count = 0;
66
67 m_instCache_ptr = p->icache;
68 m_dataCache_ptr = p->dcache;
69 m_max_outstanding_requests = p->max_outstanding_requests;
70 m_deadlock_threshold = p->deadlock_threshold;
71
72 assert(m_max_outstanding_requests > 0);

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128 assert(m_outstanding_count == total_outstanding);
129
130 if (m_outstanding_count > 0) {
131 // If there are still outstanding requests, keep checking
132 schedule(deadlockCheckEvent, clockEdge(m_deadlock_threshold));
133 }
134}
135
60 m_outstanding_count = 0;
61
62 m_instCache_ptr = p->icache;
63 m_dataCache_ptr = p->dcache;
64 m_max_outstanding_requests = p->max_outstanding_requests;
65 m_deadlock_threshold = p->deadlock_threshold;
66
67 assert(m_max_outstanding_requests > 0);

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123 assert(m_outstanding_count == total_outstanding);
124
125 if (m_outstanding_count > 0) {
126 // If there are still outstanding requests, keep checking
127 schedule(deadlockCheckEvent, clockEdge(m_deadlock_threshold));
128 }
129}
130
136void Sequencer::clearStats()
131void Sequencer::resetStats()
137{
132{
138 m_outstandReqHist.clear();
139
140 // Initialize the histograms that track latency of all requests
141 m_latencyHist.clear(20);
142 m_typeLatencyHist.resize(RubyRequestType_NUM);
133 m_latencyHist.reset();
134 m_hitLatencyHist.reset();
135 m_missLatencyHist.reset();
143 for (int i = 0; i < RubyRequestType_NUM; i++) {
136 for (int i = 0; i < RubyRequestType_NUM; i++) {
144 m_typeLatencyHist[i].clear(20);
145 }
146
147 // Initialize the histograms that track latency of requests that
148 // hit in the cache attached to the sequencer.
149 m_hitLatencyHist.clear(20);
150 m_hitTypeLatencyHist.resize(RubyRequestType_NUM);
151 m_hitTypeMachLatencyHist.resize(RubyRequestType_NUM);
152
153 for (int i = 0; i < RubyRequestType_NUM; i++) {
154 m_hitTypeLatencyHist[i].clear(20);
155 m_hitTypeMachLatencyHist[i].resize(MachineType_NUM);
137 m_typeLatencyHist[i]->reset();
138 m_hitTypeLatencyHist[i]->reset();
139 m_missTypeLatencyHist[i]->reset();
156 for (int j = 0; j < MachineType_NUM; j++) {
140 for (int j = 0; j < MachineType_NUM; j++) {
157 m_hitTypeMachLatencyHist[i][j].clear(20);
141 m_hitTypeMachLatencyHist[i][j]->reset();
142 m_missTypeMachLatencyHist[i][j]->reset();
158 }
159 }
160
143 }
144 }
145
161 // Initialize the histograms that track the latency of requests that
162 // missed in the cache attached to the sequencer.
163 m_missLatencyHist.clear(20);
164 m_missTypeLatencyHist.resize(RubyRequestType_NUM);
165 m_missTypeMachLatencyHist.resize(RubyRequestType_NUM);
166
167 for (int i = 0; i < RubyRequestType_NUM; i++) {
168 m_missTypeLatencyHist[i].clear(20);
169 m_missTypeMachLatencyHist[i].resize(MachineType_NUM);
170 for (int j = 0; j < MachineType_NUM; j++) {
171 m_missTypeMachLatencyHist[i][j].clear(20);
172 }
173 }
174
175 m_hitMachLatencyHist.resize(MachineType_NUM);
176 m_missMachLatencyHist.resize(MachineType_NUM);
177 m_IssueToInitialDelayHist.resize(MachineType_NUM);
178 m_InitialToForwardDelayHist.resize(MachineType_NUM);
179 m_ForwardToFirstResponseDelayHist.resize(MachineType_NUM);
180 m_FirstResponseToCompletionDelayHist.resize(MachineType_NUM);
181 m_IncompleteTimes.resize(MachineType_NUM);
182
183 for (int i = 0; i < MachineType_NUM; i++) {
146 for (int i = 0; i < MachineType_NUM; i++) {
184 m_missMachLatencyHist[i].clear(20);
185 m_hitMachLatencyHist[i].clear(20);
147 m_missMachLatencyHist[i]->reset();
148 m_hitMachLatencyHist[i]->reset();
186
149
187 m_IssueToInitialDelayHist[i].clear(20);
188 m_InitialToForwardDelayHist[i].clear(20);
189 m_ForwardToFirstResponseDelayHist[i].clear(20);
190 m_FirstResponseToCompletionDelayHist[i].clear(20);
150 m_IssueToInitialDelayHist[i]->reset();
151 m_InitialToForwardDelayHist[i]->reset();
152 m_ForwardToFirstResponseDelayHist[i]->reset();
153 m_FirstResponseToCompletionDelayHist[i]->reset();
191
192 m_IncompleteTimes[i] = 0;
193 }
194}
195
196void
154
155 m_IncompleteTimes[i] = 0;
156 }
157}
158
159void
197Sequencer::printStats(ostream & out) const
198{
199 out << "Sequencer: " << m_name << endl
200 << " store_waiting_on_load_cycles: "
201 << m_store_waiting_on_load_cycles << endl
202 << " store_waiting_on_store_cycles: "
203 << m_store_waiting_on_store_cycles << endl
204 << " load_waiting_on_load_cycles: "
205 << m_load_waiting_on_load_cycles << endl
206 << " load_waiting_on_store_cycles: "
207 << m_load_waiting_on_store_cycles << endl;
208}
209
210void
211Sequencer::printProgress(ostream& out) const
212{
213#if 0
214 int total_demand = 0;
215 out << "Sequencer Stats Version " << m_version << endl;
216 out << "Current time = " << g_system_ptr->getTime() << endl;
217 out << "---------------" << endl;
218 out << "outstanding requests" << endl;

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286 (request_type == RubyRequestType_Store_Conditional) ||
287 (request_type == RubyRequestType_Locked_RMW_Read) ||
288 (request_type == RubyRequestType_Locked_RMW_Write) ||
289 (request_type == RubyRequestType_FLUSH)) {
290
291 // Check if there is any outstanding read request for the same
292 // cache line.
293 if (m_readRequestTable.count(line_addr) > 0) {
160Sequencer::printProgress(ostream& out) const
161{
162#if 0
163 int total_demand = 0;
164 out << "Sequencer Stats Version " << m_version << endl;
165 out << "Current time = " << g_system_ptr->getTime() << endl;
166 out << "---------------" << endl;
167 out << "outstanding requests" << endl;

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235 (request_type == RubyRequestType_Store_Conditional) ||
236 (request_type == RubyRequestType_Locked_RMW_Read) ||
237 (request_type == RubyRequestType_Locked_RMW_Write) ||
238 (request_type == RubyRequestType_FLUSH)) {
239
240 // Check if there is any outstanding read request for the same
241 // cache line.
242 if (m_readRequestTable.count(line_addr) > 0) {
294 m_store_waiting_on_load_cycles++;
243 m_store_waiting_on_load++;
295 return RequestStatus_Aliased;
296 }
297
298 pair<RequestTable::iterator, bool> r =
299 m_writeRequestTable.insert(default_entry);
300 if (r.second) {
301 RequestTable::iterator i = r.first;
302 i->second = new SequencerRequest(pkt, request_type, curCycle());
303 m_outstanding_count++;
304 } else {
305 // There is an outstanding write request for the cache line
244 return RequestStatus_Aliased;
245 }
246
247 pair<RequestTable::iterator, bool> r =
248 m_writeRequestTable.insert(default_entry);
249 if (r.second) {
250 RequestTable::iterator i = r.first;
251 i->second = new SequencerRequest(pkt, request_type, curCycle());
252 m_outstanding_count++;
253 } else {
254 // There is an outstanding write request for the cache line
306 m_store_waiting_on_store_cycles++;
255 m_store_waiting_on_store++;
307 return RequestStatus_Aliased;
308 }
309 } else {
310 // Check if there is any outstanding write request for the same
311 // cache line.
312 if (m_writeRequestTable.count(line_addr) > 0) {
256 return RequestStatus_Aliased;
257 }
258 } else {
259 // Check if there is any outstanding write request for the same
260 // cache line.
261 if (m_writeRequestTable.count(line_addr) > 0) {
313 m_load_waiting_on_store_cycles++;
262 m_load_waiting_on_store++;
314 return RequestStatus_Aliased;
315 }
316
317 pair<RequestTable::iterator, bool> r =
318 m_readRequestTable.insert(default_entry);
319
320 if (r.second) {
321 RequestTable::iterator i = r.first;
322 i->second = new SequencerRequest(pkt, request_type, curCycle());
323 m_outstanding_count++;
324 } else {
325 // There is an outstanding read request for the cache line
263 return RequestStatus_Aliased;
264 }
265
266 pair<RequestTable::iterator, bool> r =
267 m_readRequestTable.insert(default_entry);
268
269 if (r.second) {
270 RequestTable::iterator i = r.first;
271 i->second = new SequencerRequest(pkt, request_type, curCycle());
272 m_outstanding_count++;
273 } else {
274 // There is an outstanding read request for the cache line
326 m_load_waiting_on_load_cycles++;
275 m_load_waiting_on_load++;
327 return RequestStatus_Aliased;
328 }
329 }
330
276 return RequestStatus_Aliased;
277 }
278 }
279
331 m_outstandReqHist.add(m_outstanding_count);
280 m_outstandReqHist.sample(m_outstanding_count);
332 assert(m_outstanding_count ==
333 (m_writeRequestTable.size() + m_readRequestTable.size()));
334
335 return RequestStatus_Ready;
336}
337
338void
339Sequencer::markRemoved()

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427void
428Sequencer::recordMissLatency(const Cycles cycles, const RubyRequestType type,
429 const MachineType respondingMach,
430 bool isExternalHit, Cycles issuedTime,
431 Cycles initialRequestTime,
432 Cycles forwardRequestTime,
433 Cycles firstResponseTime, Cycles completionTime)
434{
281 assert(m_outstanding_count ==
282 (m_writeRequestTable.size() + m_readRequestTable.size()));
283
284 return RequestStatus_Ready;
285}
286
287void
288Sequencer::markRemoved()

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376void
377Sequencer::recordMissLatency(const Cycles cycles, const RubyRequestType type,
378 const MachineType respondingMach,
379 bool isExternalHit, Cycles issuedTime,
380 Cycles initialRequestTime,
381 Cycles forwardRequestTime,
382 Cycles firstResponseTime, Cycles completionTime)
383{
435 m_latencyHist.add(cycles);
436 m_typeLatencyHist[type].add(cycles);
384 m_latencyHist.sample(cycles);
385 m_typeLatencyHist[type]->sample(cycles);
437
438 if (isExternalHit) {
386
387 if (isExternalHit) {
439 m_missLatencyHist.add(cycles);
440 m_missTypeLatencyHist[type].add(cycles);
388 m_missLatencyHist.sample(cycles);
389 m_missTypeLatencyHist[type]->sample(cycles);
441
442 if (respondingMach != MachineType_NUM) {
390
391 if (respondingMach != MachineType_NUM) {
443 m_missMachLatencyHist[respondingMach].add(cycles);
444 m_missTypeMachLatencyHist[type][respondingMach].add(cycles);
392 m_missMachLatencyHist[respondingMach]->sample(cycles);
393 m_missTypeMachLatencyHist[type][respondingMach]->sample(cycles);
445
446 if ((issuedTime <= initialRequestTime) &&
447 (initialRequestTime <= forwardRequestTime) &&
448 (forwardRequestTime <= firstResponseTime) &&
449 (firstResponseTime <= completionTime)) {
450
394
395 if ((issuedTime <= initialRequestTime) &&
396 (initialRequestTime <= forwardRequestTime) &&
397 (forwardRequestTime <= firstResponseTime) &&
398 (firstResponseTime <= completionTime)) {
399
451 m_IssueToInitialDelayHist[respondingMach].add(
400 m_IssueToInitialDelayHist[respondingMach]->sample(
452 initialRequestTime - issuedTime);
401 initialRequestTime - issuedTime);
453 m_InitialToForwardDelayHist[respondingMach].add(
402 m_InitialToForwardDelayHist[respondingMach]->sample(
454 forwardRequestTime - initialRequestTime);
403 forwardRequestTime - initialRequestTime);
455 m_ForwardToFirstResponseDelayHist[respondingMach].add(
404 m_ForwardToFirstResponseDelayHist[respondingMach]->sample(
456 firstResponseTime - forwardRequestTime);
405 firstResponseTime - forwardRequestTime);
457 m_FirstResponseToCompletionDelayHist[respondingMach].add(
406 m_FirstResponseToCompletionDelayHist[respondingMach]->sample(
458 completionTime - firstResponseTime);
459 } else {
460 m_IncompleteTimes[respondingMach]++;
461 }
462 }
463 } else {
407 completionTime - firstResponseTime);
408 } else {
409 m_IncompleteTimes[respondingMach]++;
410 }
411 }
412 } else {
464 m_hitLatencyHist.add(cycles);
465 m_hitTypeLatencyHist[type].add(cycles);
413 m_hitLatencyHist.sample(cycles);
414 m_hitTypeLatencyHist[type]->sample(cycles);
466
467 if (respondingMach != MachineType_NUM) {
415
416 if (respondingMach != MachineType_NUM) {
468 m_hitMachLatencyHist[respondingMach].add(cycles);
469 m_hitTypeMachLatencyHist[type][respondingMach].add(cycles);
417 m_hitMachLatencyHist[respondingMach]->sample(cycles);
418 m_hitTypeMachLatencyHist[type][respondingMach]->sample(cycles);
470 }
471 }
472}
473
474void
475Sequencer::writeCallback(const Address& address, DataBlock& data,
476 const bool externalHit, const MachineType mach,
477 const Cycles initialRequestTime,

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805}
806
807
808void
809Sequencer::evictionCallback(const Address& address)
810{
811 ruby_eviction_callback(address);
812}
419 }
420 }
421}
422
423void
424Sequencer::writeCallback(const Address& address, DataBlock& data,
425 const bool externalHit, const MachineType mach,
426 const Cycles initialRequestTime,

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754}
755
756
757void
758Sequencer::evictionCallback(const Address& address)
759{
760 ruby_eviction_callback(address);
761}
762
763void
764Sequencer::regStats()
765{
766 m_store_waiting_on_load
767 .name(name() + ".store_waiting_on_load")
768 .desc("Number of times a store aliased with a pending load")
769 .flags(Stats::nozero);
770 m_store_waiting_on_store
771 .name(name() + ".store_waiting_on_store")
772 .desc("Number of times a store aliased with a pending store")
773 .flags(Stats::nozero);
774 m_load_waiting_on_load
775 .name(name() + ".load_waiting_on_load")
776 .desc("Number of times a load aliased with a pending load")
777 .flags(Stats::nozero);
778 m_load_waiting_on_store
779 .name(name() + ".load_waiting_on_store")
780 .desc("Number of times a load aliased with a pending store")
781 .flags(Stats::nozero);
782
783 // These statistical variables are not for display.
784 // The profiler will collate these across different
785 // sequencers and display those collated statistics.
786 m_outstandReqHist.init(10);
787 m_latencyHist.init(10);
788 m_hitLatencyHist.init(10);
789 m_missLatencyHist.init(10);
790
791 for (int i = 0; i < RubyRequestType_NUM; i++) {
792 m_typeLatencyHist.push_back(new Stats::Histogram());
793 m_typeLatencyHist[i]->init(10);
794
795 m_hitTypeLatencyHist.push_back(new Stats::Histogram());
796 m_hitTypeLatencyHist[i]->init(10);
797
798 m_missTypeLatencyHist.push_back(new Stats::Histogram());
799 m_missTypeLatencyHist[i]->init(10);
800 }
801
802 for (int i = 0; i < MachineType_NUM; i++) {
803 m_hitMachLatencyHist.push_back(new Stats::Histogram());
804 m_hitMachLatencyHist[i]->init(10);
805
806 m_missMachLatencyHist.push_back(new Stats::Histogram());
807 m_missMachLatencyHist[i]->init(10);
808
809 m_IssueToInitialDelayHist.push_back(new Stats::Histogram());
810 m_IssueToInitialDelayHist[i]->init(10);
811
812 m_InitialToForwardDelayHist.push_back(new Stats::Histogram());
813 m_InitialToForwardDelayHist[i]->init(10);
814
815 m_ForwardToFirstResponseDelayHist.push_back(new Stats::Histogram());
816 m_ForwardToFirstResponseDelayHist[i]->init(10);
817
818 m_FirstResponseToCompletionDelayHist.push_back(new Stats::Histogram());
819 m_FirstResponseToCompletionDelayHist[i]->init(10);
820 }
821
822 for (int i = 0; i < RubyRequestType_NUM; i++) {
823 m_hitTypeMachLatencyHist.push_back(std::vector<Stats::Histogram *>());
824 m_missTypeMachLatencyHist.push_back(std::vector<Stats::Histogram *>());
825
826 for (int j = 0; j < MachineType_NUM; j++) {
827 m_hitTypeMachLatencyHist[i].push_back(new Stats::Histogram());
828 m_hitTypeMachLatencyHist[i][j]->init(10);
829
830 m_missTypeMachLatencyHist[i].push_back(new Stats::Histogram());
831 m_missTypeMachLatencyHist[i][j]->init(10);
832 }
833 }
834}