Sequencer.cc (7823:dac01f14f20f) Sequencer.cc (7832:de7601e6e19d)
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 471 unchanged lines hidden (view full) ---

480 if (mach == GenericMachineType_Directory) {
481 g_system_ptr->getProfiler()->missLatencyDir(issued_time,
482 initialRequestTime,
483 forwardRequestTime,
484 firstResponseTime,
485 g_eventQueue_ptr->getTime());
486 }
487
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 471 unchanged lines hidden (view full) ---

480 if (mach == GenericMachineType_Directory) {
481 g_system_ptr->getProfiler()->missLatencyDir(issued_time,
482 initialRequestTime,
483 forwardRequestTime,
484 firstResponseTime,
485 g_eventQueue_ptr->getTime());
486 }
487
488 if (Debug::getProtocolTrace()) {
489 if (success) {
490 g_system_ptr->getProfiler()->
491 profileTransition("Seq", m_version,
492 Address(ruby_request.paddr), "", "Done", "",
493 csprintf("%d cycles", miss_latency));
494 } else {
495 g_system_ptr->getProfiler()->
496 profileTransition("Seq", m_version,
497 Address(ruby_request.paddr), "", "SC_Failed", "",
498 csprintf("%d cycles", miss_latency));
499 }
500 }
488 DPRINTFR(ProtocolTrace, "%7s %3s %10s%20s %6s>%-6s %s %d cycles\n",
489 g_eventQueue_ptr->getTime(), m_version, "Seq",
490 success ? "Done" : "SC_Failed", "", "",
491 Address(ruby_request.paddr), miss_latency);
501 }
502#if 0
503 if (request.getPrefetch() == PrefetchBit_Yes) {
504 return; // Ignore the prefetch
505 }
506#endif
507
508 // update the data

--- 144 unchanged lines hidden (view full) ---

653 }
654
655 Address line_addr(request.paddr);
656 line_addr.makeLineAddress();
657 CacheMsg *msg = new CacheMsg(line_addr, Address(request.paddr), ctype,
658 Address(request.pc), amtype, request.len, PrefetchBit_No,
659 request.proc_id);
660
492 }
493#if 0
494 if (request.getPrefetch() == PrefetchBit_Yes) {
495 return; // Ignore the prefetch
496 }
497#endif
498
499 // update the data

--- 144 unchanged lines hidden (view full) ---

644 }
645
646 Address line_addr(request.paddr);
647 line_addr.makeLineAddress();
648 CacheMsg *msg = new CacheMsg(line_addr, Address(request.paddr), ctype,
649 Address(request.pc), amtype, request.len, PrefetchBit_No,
650 request.proc_id);
651
661 if (Debug::getProtocolTrace()) {
662 g_system_ptr->getProfiler()->
663 profileTransition("Seq", m_version, Address(request.paddr),
664 "", "Begin", "",
665 RubyRequestType_to_string(request.type));
666 }
652 DPRINTFR(ProtocolTrace, "%7s %3s %10s%20s %6s>%-6s %s %s\n",
653 g_eventQueue_ptr->getTime(), m_version, "Seq", "Begin", "", "",
654 Address(request.paddr), RubyRequestType_to_string(request.type));
667
655
668 if (g_system_ptr->getTracer()->traceEnabled()) {
669 g_system_ptr->getTracer()->
670 traceRequest(this, line_addr, Address(request.pc),
671 request.type, g_eventQueue_ptr->getTime());
672 }
673
674 Time latency = 0; // initialzed to an null value
675
676 if (request.type == RubyRequestType_IFETCH)
677 latency = m_instCache_ptr->getLatency();
678 else
679 latency = m_dataCache_ptr->getLatency();
680
681 // Send the message to the cache controller

--- 54 unchanged lines hidden --- 		656 Time latency = 0; // initialzed to an null value
657
658 if (request.type == RubyRequestType_IFETCH)
659 latency = m_instCache_ptr->getLatency();
660 else
661 latency = m_dataCache_ptr->getLatency();
662
663 // Send the message to the cache controller

--- 54 unchanged lines hidden ---