Sequencer.cc (11448:8d94df4c9da4) Sequencer.cc (11519:bf08fb8ccf4b)
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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473 (type == RubyRequestType_IFETCH) ||
474 (type == RubyRequestType_RMW_Read) ||
475 (type == RubyRequestType_Locked_RMW_Read) ||
476 (type == RubyRequestType_Load_Linked)) {
477 memcpy(pkt->getPtr<uint8_t>(),
478 data.getData(getOffset(request_address), pkt->getSize()),
479 pkt->getSize());
480 DPRINTF(RubySequencer, "read data %s\n", data);
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 464 unchanged lines hidden (view full) ---

473 (type == RubyRequestType_IFETCH) ||
474 (type == RubyRequestType_RMW_Read) ||
475 (type == RubyRequestType_Locked_RMW_Read) ||
476 (type == RubyRequestType_Load_Linked)) {
477 memcpy(pkt->getPtr<uint8_t>(),
478 data.getData(getOffset(request_address), pkt->getSize()),
479 pkt->getSize());
480 DPRINTF(RubySequencer, "read data %s\n", data);
481 } else if (pkt->req->isSwap()) {
482 std::vector<uint8_t> overwrite_val(pkt->getSize());
483 memcpy(&overwrite_val[0], pkt->getConstPtr<uint8_t>(),
484 pkt->getSize());
485 memcpy(pkt->getPtr<uint8_t>(),
486 data.getData(getOffset(request_address), pkt->getSize()),
487 pkt->getSize());
488 data.setData(&overwrite_val[0],
489 getOffset(request_address), pkt->getSize());
490 DPRINTF(RubySequencer, "swap data %s\n", data);
481 } else {
482 data.setData(pkt->getConstPtr<uint8_t>(),
483 getOffset(request_address), pkt->getSize());
484 DPRINTF(RubySequencer, "set data %s\n", data);
485 }
486 }
487
488 // If using the RubyTester, update the RubyTester sender state's

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560 primary_type = RubyRequestType_Locked_RMW_Write;
561 } else {
562 DPRINTF(RubySequencer, "Issuing Locked RMW Read\n");
563 assert(pkt->isRead());
564 primary_type = RubyRequestType_Locked_RMW_Read;
565 }
566 secondary_type = RubyRequestType_ST;
567 } else {
491 } else {
492 data.setData(pkt->getConstPtr<uint8_t>(),
493 getOffset(request_address), pkt->getSize());
494 DPRINTF(RubySequencer, "set data %s\n", data);
495 }
496 }
497
498 // If using the RubyTester, update the RubyTester sender state's

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570 primary_type = RubyRequestType_Locked_RMW_Write;
571 } else {
572 DPRINTF(RubySequencer, "Issuing Locked RMW Read\n");
573 assert(pkt->isRead());
574 primary_type = RubyRequestType_Locked_RMW_Read;
575 }
576 secondary_type = RubyRequestType_ST;
577 } else {
568 if (pkt->isRead()) {
578 //
579 // To support SwapReq, we need to check isWrite() first: a SwapReq
580 // should always be treated like a write, but since a SwapReq implies
581 // both isWrite() and isRead() are true, check isWrite() first here.
582 //
583 if (pkt->isWrite()) {
584 //
585 // Note: M5 packets do not differentiate ST from RMW_Write
586 //
587 primary_type = secondary_type = RubyRequestType_ST;
588 } else if (pkt->isRead()) {
569 if (pkt->req->isInstFetch()) {
570 primary_type = secondary_type = RubyRequestType_IFETCH;
571 } else {
572 bool storeCheck = false;
573 // only X86 need the store check
574 if (system->getArch() == Arch::X86ISA) {
575 uint32_t flags = pkt->req->getFlags();
576 storeCheck = flags &
577 (X86ISA::StoreCheck << X86ISA::FlagShift);
578 }
579 if (storeCheck) {
580 primary_type = RubyRequestType_RMW_Read;
581 secondary_type = RubyRequestType_ST;
582 } else {
583 primary_type = secondary_type = RubyRequestType_LD;
584 }
585 }
589 if (pkt->req->isInstFetch()) {
590 primary_type = secondary_type = RubyRequestType_IFETCH;
591 } else {
592 bool storeCheck = false;
593 // only X86 need the store check
594 if (system->getArch() == Arch::X86ISA) {
595 uint32_t flags = pkt->req->getFlags();
596 storeCheck = flags &
597 (X86ISA::StoreCheck << X86ISA::FlagShift);
598 }
599 if (storeCheck) {
600 primary_type = RubyRequestType_RMW_Read;
601 secondary_type = RubyRequestType_ST;
602 } else {
603 primary_type = secondary_type = RubyRequestType_LD;
604 }
605 }
586 } else if (pkt->isWrite()) {
587 //
588 // Note: M5 packets do not differentiate ST from RMW_Write
589 //
590 primary_type = secondary_type = RubyRequestType_ST;
591 } else if (pkt->isFlush()) {
592 primary_type = secondary_type = RubyRequestType_FLUSH;
593 } else {
594 panic("Unsupported ruby packet type\n");
595 }
596 }
597
598 RequestStatus status = insertRequest(pkt, primary_type);

--- 179 unchanged lines hidden --- 		606 } else if (pkt->isFlush()) {
607 primary_type = secondary_type = RubyRequestType_FLUSH;
608 } else {
609 panic("Unsupported ruby packet type\n");
610 }
611 }
612
613 RequestStatus status = insertRequest(pkt, primary_type);

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