616,622c616,622
< #if 0
< uinteger_t tick = SIMICS_read_control_register(m_version, SIMICS_get_register_number(m_version, "tick"));
< uinteger_t tick_cmpr = SIMICS_read_control_register(m_version, SIMICS_get_register_number(m_version, "tick_cmpr"));
< uinteger_t stick = SIMICS_read_control_register(m_version, SIMICS_get_register_number(m_version, "stick"));
< uinteger_t stick_cmpr = SIMICS_read_control_register(m_version, SIMICS_get_register_number(m_version, "stick_cmpr"));
< cout << "END PROC " << m_version << hex << " tick = " << tick << " tick_cmpr = " << tick_cmpr << " stick = " << stick << " stick_cmpr = " << stick_cmpr << " cycle = "<< g_eventQueue_ptr->getTime() << dec << endl;
< #endif
---
> #if 0
> uinteger_t tick = SIMICS_read_control_register(m_version, SIMICS_get_register_number(m_version, "tick"));
> uinteger_t tick_cmpr = SIMICS_read_control_register(m_version, SIMICS_get_register_number(m_version, "tick_cmpr"));
> uinteger_t stick = SIMICS_read_control_register(m_version, SIMICS_get_register_number(m_version, "stick"));
> uinteger_t stick_cmpr = SIMICS_read_control_register(m_version, SIMICS_get_register_number(m_version, "stick_cmpr"));
> cout << "END PROC " << m_version << hex << " tick = " << tick << " tick_cmpr = " << tick_cmpr << " stick = " << stick << " stick_cmpr = " << stick_cmpr << " cycle = "<< g_eventQueue_ptr->getTime() << dec << endl;
> #endif
787c787,789
< bool Sequencer::isReady(const CacheMsg& request) const {
---
> bool
> Sequencer::isReady(const Packet* pkt) const
> {
788a791,826
> int cpu_number = pkt->req->contextId();
> la_t logical_addr = pkt->req->getVaddr();
> pa_t physical_addr = pkt->req->getPaddr();
> CacheRequestType type_of_request;
> if ( pkt->req->isInstFetch() ) {
> type_of_request = CacheRequestType_IFETCH;
> } else if ( pkt->req->isLocked() || pkt->req->isSwap() ) {
> type_of_request = CacheRequestType_ATOMIC;
> } else if ( pkt->isRead() ) {
> type_of_request = CacheRequestType_LD;
> } else if ( pkt->isWrite() ) {
> type_of_request = CacheRequestType_ST;
> } else {
> assert(false);
> }
> int thread = pkt->req->threadId();
>
> CacheMsg request(Address( physical_addr ),
> Address( physical_addr ),
> type_of_request,
> Address(0),
> AccessModeType_UserMode, // User/supervisor mode
> 0, // Size in bytes of request
> PrefetchBit_No, // Not a prefetch
> 0, // Version number
> Address(logical_addr), // Virtual Address
> thread, // SMT thread
> 0, // TM specific - timestamp of memory request
> false // TM specific - whether request is part of escape action
> );
> isReady(request);
> }
>
> bool
> Sequencer::isReady(const CacheMsg& request) const
> {
794d831
< int thread = request.getThreadID();
823,824c860,903
< void Sequencer::makeRequest(const CacheMsg& request) {
< //assert(isReady(request));
---
> void
> Sequencer::makeRequest(const Packet* pkt, void* data)
> {
> int cpu_number = pkt->req->contextId();
> la_t logical_addr = pkt->req->getVaddr();
> pa_t physical_addr = pkt->req->getPaddr();
> int request_size = pkt->getSize();
> CacheRequestType type_of_request;
> if ( pkt->req->isInstFetch() ) {
> type_of_request = CacheRequestType_IFETCH;
> } else if ( pkt->req->isLocked() || pkt->req->isSwap() ) {
> type_of_request = CacheRequestType_ATOMIC;
> } else if ( pkt->isRead() ) {
> type_of_request = CacheRequestType_LD;
> } else if ( pkt->isWrite() ) {
> type_of_request = CacheRequestType_ST;
> } else {
> assert(false);
> }
> la_t virtual_pc = pkt->req->getPC();
> int isPriv = false; // TODO: get permission data
> int thread = pkt->req->threadId();
>
> AccessModeType access_mode = AccessModeType_UserMode; // TODO: get actual permission
>
> CacheMsg request(Address( physical_addr ),
> Address( physical_addr ),
> type_of_request,
> Address(virtual_pc),
> access_mode, // User/supervisor mode
> request_size, // Size in bytes of request
> PrefetchBit_No, // Not a prefetch
> 0, // Version number
> Address(logical_addr), // Virtual Address
> thread, // SMT thread
> 0, // TM specific - timestamp of memory request
> false // TM specific - whether request is part of escape action
> );
> makeRequest(request);
> }
>
> void
> Sequencer::makeRequest(const CacheMsg& request)
> {
860c939
< #if 0
---
> #if 0
866c945
< #endif
---
> #endif
1048,1050c1127,1129
< // } else if (n->TBE_TABLE_MEMBER_VARIABLE->isPresent(lineAddr)){
< // ASSERT(n->TBE_TABLE_MEMBER_VARIABLE->isPresent(lineAddr));
< // L1Cache_TBE tbeEntry = n->TBE_TABLE_MEMBER_VARIABLE->lookup(lineAddr);
---
> // } else if (n->TBE_TABLE_MEMBER_VARIABLE->isPresent(lineAddr)){
> // ASSERT(n->TBE_TABLE_MEMBER_VARIABLE->isPresent(lineAddr));
> // L1Cache_TBE tbeEntry = n->TBE_TABLE_MEMBER_VARIABLE->lookup(lineAddr);
1052,1055c1131,1134
< // int offset = addr.getOffset();
< // for(int i=0; i<size_in_bytes; ++i){
< // value[i] = tbeEntry.getDataBlk().getByte(offset + i);
< // }
---
> // int offset = addr.getOffset();
> // for(int i=0; i<size_in_bytes; ++i){
> // value[i] = tbeEntry.getDataBlk().getByte(offset + i);
> // }
1057c1136
< // found = true;
---
> // found = true;
1101,1107c1180,1186
< // if(Protocol::m_CMP){
< // cout << "CMP L2 cache vec size = " << n->m_L2Cache_L2cacheMemory_vec.size() << endl;
< // }
< // else{
< // cout << "L2 cache vec size = " << n->m_L1Cache_cacheMemory_vec.size() << endl;
< // }
< // }
---
> // if(Protocol::m_CMP){
> // cout << "CMP L2 cache vec size = " << n->m_L2Cache_L2cacheMemory_vec.size() << endl;
> // }
> // else{
> // cout << "L2 cache vec size = " << n->m_L1Cache_cacheMemory_vec.size() << endl;
> // }
> // }
1129,1137c1208,1216
< // } else if (n->TBE_TABLE_MEMBER_VARIABLE->isTagPresent(lineAddr)){
< // L1Cache_TBE& tbeEntry = n->TBE_TABLE_MEMBER_VARIABLE->lookup(lineAddr);
< // DataBlock tmpData;
< // int offset = addr.getOffset();
< // for(int i=0; i<size_in_bytes; ++i){
< // tmpData.setByte(offset + i, value[i]);
< // }
< // tbeEntry.setDataBlk(tmpData);
< // tbeEntry.setDirty(true);
---
> // } else if (n->TBE_TABLE_MEMBER_VARIABLE->isTagPresent(lineAddr)){
> // L1Cache_TBE& tbeEntry = n->TBE_TABLE_MEMBER_VARIABLE->lookup(lineAddr);
> // DataBlock tmpData;
> // int offset = addr.getOffset();
> // for(int i=0; i<size_in_bytes; ++i){
> // tmpData.setByte(offset + i, value[i]);
> // }
> // tbeEntry.setDataBlk(tmpData);
> // tbeEntry.setDirty(true);