Sequencer.cc (6155:2b8fec056712) | Sequencer.cc (6161:8ad9be15d1e1) |
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1 2/* 3 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 925 unchanged lines hidden (view full) --- 934void Sequencer::checkCoherence(const Address& addr) { 935#ifdef CHECK_COHERENCE 936 g_system_ptr->checkGlobalCoherenceInvariant(addr); 937#endif 938} 939 940bool Sequencer::getRubyMemoryValue(const Address& addr, char* value, 941 unsigned int size_in_bytes ) { | 1 2/* 3 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 925 unchanged lines hidden (view full) --- 934void Sequencer::checkCoherence(const Address& addr) { 935#ifdef CHECK_COHERENCE 936 g_system_ptr->checkGlobalCoherenceInvariant(addr); 937#endif 938} 939 940bool Sequencer::getRubyMemoryValue(const Address& addr, char* value, 941 unsigned int size_in_bytes ) { |
942 if(g_SIMULATING){ 943 for(unsigned int i=0; i < size_in_bytes; i++) { 944 std::cerr << __FILE__ << "(" << __LINE__ << "): Not implemented. " << std::endl; 945 value[i] = 0; // _read_physical_memory( m_chip_ptr->getID()*RubyConfig::numberOfProcsPerChip()+m_version, 946 // addr.getAddress() + i, 1 ); 947 } 948 return false; // Do nothing? 949 } else { 950 bool found = false; 951 const Address lineAddr = line_address(addr); 952 DataBlock data; 953 PhysAddress paddr(addr); 954 DataBlock* dataPtr = &data; 955 Chip* n = dynamic_cast<Chip*>(m_chip_ptr); 956 // LUKE - use variable names instead of macros 957 assert(n->m_L1Cache_L1IcacheMemory_vec[m_version] != NULL); 958 assert(n->m_L1Cache_L1DcacheMemory_vec[m_version] != NULL); 959 960 MachineID l2_mach = map_L2ChipId_to_L2Cache(addr, m_chip_ptr->getID() ); 961 int l2_ver = l2_mach.num%RubyConfig::numberOfL2CachePerChip(); 962 963 if (Protocol::m_TwoLevelCache) { 964 if(Protocol::m_CMP){ 965 assert(n->m_L2Cache_L2cacheMemory_vec[l2_ver] != NULL); 966 } 967 else{ 968 assert(n->m_L1Cache_cacheMemory_vec[m_version] != NULL); 969 } 970 } 971 972 if (n->m_L1Cache_L1IcacheMemory_vec[m_version]->tryCacheAccess(lineAddr, CacheRequestType_IFETCH, dataPtr)){ 973 n->m_L1Cache_L1IcacheMemory_vec[m_version]->getMemoryValue(addr, value, size_in_bytes); 974 found = true; 975 } else if (n->m_L1Cache_L1DcacheMemory_vec[m_version]->tryCacheAccess(lineAddr, CacheRequestType_LD, dataPtr)){ 976 n->m_L1Cache_L1DcacheMemory_vec[m_version]->getMemoryValue(addr, value, size_in_bytes); 977 found = true; 978 } else if (Protocol::m_CMP && n->m_L2Cache_L2cacheMemory_vec[l2_ver]->tryCacheAccess(lineAddr, CacheRequestType_LD, dataPtr)){ 979 n->m_L2Cache_L2cacheMemory_vec[l2_ver]->getMemoryValue(addr, value, size_in_bytes); 980 found = true; 981 // } else if (n->TBE_TABLE_MEMBER_VARIABLE->isPresent(lineAddr)){ 982 // ASSERT(n->TBE_TABLE_MEMBER_VARIABLE->isPresent(lineAddr)); 983 // L1Cache_TBE tbeEntry = n->TBE_TABLE_MEMBER_VARIABLE->lookup(lineAddr); 984 985 // int offset = addr.getOffset(); 986 // for(int i=0; i<size_in_bytes; ++i){ 987 // value[i] = tbeEntry.getDataBlk().getByte(offset + i); 988 // } 989 990 // found = true; 991 } else { 992 // Address not found 993 //cout << " " << m_chip_ptr->getID() << " NOT IN CACHE, Value at Directory is: " << (int) value[0] << endl; 994 n = dynamic_cast<Chip*>(g_system_ptr->getChip(map_Address_to_DirectoryNode(addr)/RubyConfig::numberOfDirectoryPerChip())); 995 int dir_version = map_Address_to_DirectoryNode(addr)%RubyConfig::numberOfDirectoryPerChip(); 996 for(unsigned int i=0; i<size_in_bytes; ++i){ 997 int offset = addr.getOffset(); 998 value[i] = n->m_Directory_directory_vec[dir_version]->lookup(lineAddr).m_DataBlk.getByte(offset + i); 999 } 1000 // Address not found 1001 //WARN_MSG("Couldn't find address"); 1002 //WARN_EXPR(addr); 1003 found = false; 1004 } 1005 return true; | 942 for(unsigned int i=0; i < size_in_bytes; i++) { 943 std::cerr << __FILE__ << "(" << __LINE__ << "): Not implemented. " << std::endl; 944 value[i] = 0; // _read_physical_memory( m_chip_ptr->getID()*RubyConfig::numberOfProcsPerChip()+m_version, 945 // addr.getAddress() + i, 1 ); |
1006 } | 946 } |
947 return false; // Do nothing? |
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1007} 1008 1009bool Sequencer::setRubyMemoryValue(const Address& addr, char *value, 1010 unsigned int size_in_bytes) { 1011 char test_buffer[64]; 1012 | 948} 949 950bool Sequencer::setRubyMemoryValue(const Address& addr, char *value, 951 unsigned int size_in_bytes) { 952 char test_buffer[64]; 953 |
1013 if(g_SIMULATING){ 1014 return false; // Do nothing? 1015 } else { 1016 // idea here is that coherent cache should find the 1017 // latest data, the update it 1018 bool found = false; 1019 const Address lineAddr = line_address(addr); 1020 PhysAddress paddr(addr); 1021 DataBlock data; 1022 DataBlock* dataPtr = &data; 1023 Chip* n = dynamic_cast<Chip*>(m_chip_ptr); 1024 1025 MachineID l2_mach = map_L2ChipId_to_L2Cache(addr, m_chip_ptr->getID() ); 1026 int l2_ver = l2_mach.num%RubyConfig::numberOfL2CachePerChip(); 1027 // LUKE - use variable names instead of macros 1028 //cout << "number of L2caches per chip = " << RubyConfig::numberOfL2CachePerChip(m_version) << endl; 1029 //cout << "L1I cache vec size = " << n->m_L1Cache_L1IcacheMemory_vec.size() << endl; 1030 //cout << "L1D cache vec size = " << n->m_L1Cache_L1DcacheMemory_vec.size() << endl; 1031 //cout << "L1cache_cachememory size = " << n->m_L1Cache_cacheMemory_vec.size() << endl; 1032 //cout << "L1cache_l2cachememory size = " << n->m_L1Cache_L2cacheMemory_vec.size() << endl; 1033 // if (Protocol::m_TwoLevelCache) { 1034 // if(Protocol::m_CMP){ 1035 // cout << "CMP L2 cache vec size = " << n->m_L2Cache_L2cacheMemory_vec.size() << endl; 1036 // } 1037 // else{ 1038 // cout << "L2 cache vec size = " << n->m_L1Cache_cacheMemory_vec.size() << endl; 1039 // } 1040 // } 1041 1042 assert(n->m_L1Cache_L1IcacheMemory_vec[m_version] != NULL); 1043 assert(n->m_L1Cache_L1DcacheMemory_vec[m_version] != NULL); 1044 if (Protocol::m_TwoLevelCache) { 1045 if(Protocol::m_CMP){ 1046 assert(n->m_L2Cache_L2cacheMemory_vec[l2_ver] != NULL); 1047 } 1048 else{ 1049 assert(n->m_L1Cache_cacheMemory_vec[m_version] != NULL); 1050 } 1051 } 1052 1053 if (n->m_L1Cache_L1IcacheMemory_vec[m_version]->tryCacheAccess(lineAddr, CacheRequestType_IFETCH, dataPtr)){ 1054 n->m_L1Cache_L1IcacheMemory_vec[m_version]->setMemoryValue(addr, value, size_in_bytes); 1055 found = true; 1056 } else if (n->m_L1Cache_L1DcacheMemory_vec[m_version]->tryCacheAccess(lineAddr, CacheRequestType_LD, dataPtr)){ 1057 n->m_L1Cache_L1DcacheMemory_vec[m_version]->setMemoryValue(addr, value, size_in_bytes); 1058 found = true; 1059 } else if (Protocol::m_CMP && n->m_L2Cache_L2cacheMemory_vec[l2_ver]->tryCacheAccess(lineAddr, CacheRequestType_LD, dataPtr)){ 1060 n->m_L2Cache_L2cacheMemory_vec[l2_ver]->setMemoryValue(addr, value, size_in_bytes); 1061 found = true; 1062 // } else if (n->TBE_TABLE_MEMBER_VARIABLE->isTagPresent(lineAddr)){ 1063 // L1Cache_TBE& tbeEntry = n->TBE_TABLE_MEMBER_VARIABLE->lookup(lineAddr); 1064 // DataBlock tmpData; 1065 // int offset = addr.getOffset(); 1066 // for(int i=0; i<size_in_bytes; ++i){ 1067 // tmpData.setByte(offset + i, value[i]); 1068 // } 1069 // tbeEntry.setDataBlk(tmpData); 1070 // tbeEntry.setDirty(true); 1071 } else { 1072 // Address not found 1073 n = dynamic_cast<Chip*>(g_system_ptr->getChip(map_Address_to_DirectoryNode(addr)/RubyConfig::numberOfDirectoryPerChip())); 1074 int dir_version = map_Address_to_DirectoryNode(addr)%RubyConfig::numberOfDirectoryPerChip(); 1075 for(unsigned int i=0; i<size_in_bytes; ++i){ 1076 int offset = addr.getOffset(); 1077 n->m_Directory_directory_vec[dir_version]->lookup(lineAddr).m_DataBlk.setByte(offset + i, value[i]); 1078 } 1079 found = false; 1080 } 1081 1082 if (found){ 1083 found = getRubyMemoryValue(addr, test_buffer, size_in_bytes); 1084 assert(found); 1085 if(value[0] != test_buffer[0]){ 1086 WARN_EXPR((int) value[0]); 1087 WARN_EXPR((int) test_buffer[0]); 1088 ERROR_MSG("setRubyMemoryValue failed to set value."); 1089 } 1090 } 1091 1092 return true; 1093 } | 954 return false; // Do nothing? |
1094} 1095 | 955} 956 |