DMASequencer.hh (7039:bc0b6ea676b5) | DMASequencer.hh (8615:e66a566f2cfa) |
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1/* 2 * Copyright (c) 2008 Mark D. Hill and David A. Wood 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 39 unchanged lines hidden (view full) --- 48 49class DMASequencer : public RubyPort 50{ 51 public: 52 typedef DMASequencerParams Params; 53 DMASequencer(const Params *); 54 void init(); 55 /* external interface */ | 1/* 2 * Copyright (c) 2008 Mark D. Hill and David A. Wood 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 39 unchanged lines hidden (view full) --- 48 49class DMASequencer : public RubyPort 50{ 51 public: 52 typedef DMASequencerParams Params; 53 DMASequencer(const Params *); 54 void init(); 55 /* external interface */ |
56 RequestStatus makeRequest(const RubyRequest & request); | 56 RequestStatus makeRequest(PacketPtr pkt); |
57 bool busy() { return m_is_busy;} 58 59 /* SLICC callback */ 60 void dataCallback(const DataBlock & dblk); 61 void ackCallback(); 62 63 void printConfig(std::ostream & out); 64 65 private: 66 void issueNext(); 67 68 private: 69 bool m_is_busy; 70 uint64_t m_data_block_mask; 71 DMARequest active_request; 72 int num_active_requests; 73}; 74 75#endif // __MEM_RUBY_SYSTEM_DMASEQUENCER_HH__ | 57 bool busy() { return m_is_busy;} 58 59 /* SLICC callback */ 60 void dataCallback(const DataBlock & dblk); 61 void ackCallback(); 62 63 void printConfig(std::ostream & out); 64 65 private: 66 void issueNext(); 67 68 private: 69 bool m_is_busy; 70 uint64_t m_data_block_mask; 71 DMARequest active_request; 72 int num_active_requests; 73}; 74 75#endif // __MEM_RUBY_SYSTEM_DMASEQUENCER_HH__ |