DMASequencer.hh (6368:cecc7019b458) DMASequencer.hh (6825:104115ebc206)
1
2#ifndef DMASEQUENCER_H
3#define DMASEQUENCER_H
4
5#include <ostream>
6#include "mem/ruby/common/DataBlock.hh"
7#include "mem/ruby/system/RubyPort.hh"
8

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20class AbstractController;
21
22class DMASequencer :public RubyPort {
23public:
24 DMASequencer(const string & name);
25 void init(const vector<string> & argv);
26 /* external interface */
27 int64_t makeRequest(const RubyRequest & request);
1
2#ifndef DMASEQUENCER_H
3#define DMASEQUENCER_H
4
5#include <ostream>
6#include "mem/ruby/common/DataBlock.hh"
7#include "mem/ruby/system/RubyPort.hh"
8

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20class AbstractController;
21
22class DMASequencer :public RubyPort {
23public:
24 DMASequencer(const string & name);
25 void init(const vector<string> & argv);
26 /* external interface */
27 int64_t makeRequest(const RubyRequest & request);
28 bool isReady(const RubyRequest & request, bool dont_set = false) { assert(0); return false;};
28 // void issueRequest(uint64_t paddr, uint8* data, int len, bool rw);
29 bool busy() { return m_is_busy;}
30
31 /* SLICC callback */
32 void dataCallback(const DataBlock & dblk);
33 void ackCallback();
34
35 void printConfig(std::ostream & out);

--- 15 unchanged lines hidden --- 		29 // void issueRequest(uint64_t paddr, uint8* data, int len, bool rw);
30 bool busy() { return m_is_busy;}
31
32 /* SLICC callback */
33 void dataCallback(const DataBlock & dblk);
34 void ackCallback();
35
36 void printConfig(std::ostream & out);

--- 15 unchanged lines hidden ---