DMASequencer.hh (10913:38dbdeea7f1f) | DMASequencer.hh (10919:80069a602c83) |
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1/* 2 * Copyright (c) 2008 Mark D. Hill and David A. Wood 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 18 unchanged lines hidden (view full) --- 27 */ 28 29#ifndef __MEM_RUBY_SYSTEM_DMASEQUENCER_HH__ 30#define __MEM_RUBY_SYSTEM_DMASEQUENCER_HH__ 31 32#include <memory> 33#include <ostream> 34 | 1/* 2 * Copyright (c) 2008 Mark D. Hill and David A. Wood 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 18 unchanged lines hidden (view full) --- 27 */ 28 29#ifndef __MEM_RUBY_SYSTEM_DMASEQUENCER_HH__ 30#define __MEM_RUBY_SYSTEM_DMASEQUENCER_HH__ 31 32#include <memory> 33#include <ostream> 34 |
35#include "mem/mem_object.hh" |
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35#include "mem/protocol/DMASequencerRequestType.hh" 36#include "mem/protocol/RequestStatus.hh" 37#include "mem/ruby/common/DataBlock.hh" 38#include "mem/ruby/network/MessageBuffer.hh" 39#include "mem/ruby/system/System.hh" | 36#include "mem/protocol/DMASequencerRequestType.hh" 37#include "mem/protocol/RequestStatus.hh" 38#include "mem/ruby/common/DataBlock.hh" 39#include "mem/ruby/network/MessageBuffer.hh" 40#include "mem/ruby/system/System.hh" |
40#include "mem/mem_object.hh" | |
41#include "mem/simple_mem.hh" 42#include "mem/tport.hh" 43#include "params/DMASequencer.hh" 44 45class AbstractController; 46 47struct DMARequest 48{ --- 7 unchanged lines hidden (view full) --- 56}; 57 58class DMASequencer : public MemObject 59{ 60 public: 61 typedef DMASequencerParams Params; 62 DMASequencer(const Params *); 63 void init(); | 41#include "mem/simple_mem.hh" 42#include "mem/tport.hh" 43#include "params/DMASequencer.hh" 44 45class AbstractController; 46 47struct DMARequest 48{ --- 7 unchanged lines hidden (view full) --- 56}; 57 58class DMASequencer : public MemObject 59{ 60 public: 61 typedef DMASequencerParams Params; 62 DMASequencer(const Params *); 63 void init(); |
64 RubySystem *m_ruby_system; |
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64 65 public: 66 class MemSlavePort : public QueuedSlavePort 67 { 68 private: 69 RespPacketQueue queue; | 65 66 public: 67 class MemSlavePort : public QueuedSlavePort 68 { 69 private: 70 RespPacketQueue queue; |
70 RubySystem* ruby_system; | 71 RubySystem* m_ruby_system; |
71 bool access_backing_store; 72 73 public: 74 MemSlavePort(const std::string &_name, DMASequencer *_port, 75 PortID id, RubySystem *_ruby_system, 76 bool _access_backing_store); 77 void hitCallback(PacketPtr pkt); 78 void evictionCallback(const Address& address); --- 72 unchanged lines hidden --- | 72 bool access_backing_store; 73 74 public: 75 MemSlavePort(const std::string &_name, DMASequencer *_port, 76 PortID id, RubySystem *_ruby_system, 77 bool _access_backing_store); 78 void hitCallback(PacketPtr pkt); 79 void evictionCallback(const Address& address); --- 72 unchanged lines hidden --- |