DMASequencer.hh (10713:eddb533708cb) | DMASequencer.hh (10913:38dbdeea7f1f) |
---|---|
1/* 2 * Copyright (c) 2008 Mark D. Hill and David A. Wood 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 93 unchanged lines hidden (view full) --- 102 int outstandingCount() const { return (m_is_busy ? 1 : 0); } 103 bool isDeadlockEventScheduled() const { return false; } 104 void descheduleDeadlockEvent() {} 105 106 // Called by the controller to give the sequencer a pointer. 107 // A pointer to the controller is needed for atomic support. 108 void setController(AbstractController* _cntrl) { m_controller = _cntrl; } 109 uint32_t getId() { return m_version; } | 1/* 2 * Copyright (c) 2008 Mark D. Hill and David A. Wood 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 93 unchanged lines hidden (view full) --- 102 int outstandingCount() const { return (m_is_busy ? 1 : 0); } 103 bool isDeadlockEventScheduled() const { return false; } 104 void descheduleDeadlockEvent() {} 105 106 // Called by the controller to give the sequencer a pointer. 107 // A pointer to the controller is needed for atomic support. 108 void setController(AbstractController* _cntrl) { m_controller = _cntrl; } 109 uint32_t getId() { return m_version; } |
110 unsigned int drain(DrainManager *dm); | 110 DrainState drain() M5_ATTR_OVERRIDE; |
111 112 /* SLICC callback */ 113 void dataCallback(const DataBlock & dblk); 114 void ackCallback(); 115 116 void recordRequestType(DMASequencerRequestType requestType); 117 118 private: --- 5 unchanged lines hidden (view full) --- 124 * Called by the PIO port when receiving a timing response. 125 * 126 * @param pkt Response packet 127 * @param master_port_id Port id of the PIO port 128 * 129 * @return Whether successfully sent 130 */ 131 bool recvTimingResp(PacketPtr pkt, PortID master_port_id); | 111 112 /* SLICC callback */ 113 void dataCallback(const DataBlock & dblk); 114 void ackCallback(); 115 116 void recordRequestType(DMASequencerRequestType requestType); 117 118 private: --- 5 unchanged lines hidden (view full) --- 124 * Called by the PIO port when receiving a timing response. 125 * 126 * @param pkt Response packet 127 * @param master_port_id Port id of the PIO port 128 * 129 * @return Whether successfully sent 130 */ 131 bool recvTimingResp(PacketPtr pkt, PortID master_port_id); |
132 unsigned int getChildDrainCount(DrainManager *dm); | 132 unsigned int getChildDrainCount(); |
133 134 private: 135 uint32_t m_version; 136 AbstractController* m_controller; 137 MessageBuffer* m_mandatory_q_ptr; 138 bool m_usingRubyTester; 139 140 MemSlavePort slave_port; 141 | 133 134 private: 135 uint32_t m_version; 136 AbstractController* m_controller; 137 MessageBuffer* m_mandatory_q_ptr; 138 bool m_usingRubyTester; 139 140 MemSlavePort slave_port; 141 |
142 DrainManager *drainManager; | |
143 System* system; 144 145 bool retry; 146 bool m_is_busy; 147 uint64_t m_data_block_mask; 148 DMARequest active_request; 149}; 150 151#endif // __MEM_RUBY_SYSTEM_DMASEQUENCER_HH__ | 142 System* system; 143 144 bool retry; 145 bool m_is_busy; 146 uint64_t m_data_block_mask; 147 DMARequest active_request; 148}; 149 150#endif // __MEM_RUBY_SYSTEM_DMASEQUENCER_HH__ |