1/* 2 * Copyright (c) 2008 Mark D. Hill and David A. Wood 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29#ifndef __MEM_RUBY_SYSTEM_DMASEQUENCER_HH__ 30#define __MEM_RUBY_SYSTEM_DMASEQUENCER_HH__ 31 32#include <memory> 33#include <ostream>
| 1/* 2 * Copyright (c) 2008 Mark D. Hill and David A. Wood 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29#ifndef __MEM_RUBY_SYSTEM_DMASEQUENCER_HH__ 30#define __MEM_RUBY_SYSTEM_DMASEQUENCER_HH__ 31 32#include <memory> 33#include <ostream>
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| 34#include <unordered_map>
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34 35#include "mem/protocol/DMASequencerRequestType.hh"
| 35 36#include "mem/protocol/DMASequencerRequestType.hh"
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| 37#include "mem/ruby/common/Address.hh"
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36#include "mem/ruby/common/DataBlock.hh" 37#include "mem/ruby/system/RubyPort.hh" 38#include "params/DMASequencer.hh" 39 40struct DMARequest 41{
| 38#include "mem/ruby/common/DataBlock.hh" 39#include "mem/ruby/system/RubyPort.hh" 40#include "params/DMASequencer.hh" 41 42struct DMARequest 43{
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| 44 DMARequest(uint64_t start_paddr, int len, bool write, int bytes_completed, 45 int bytes_issued, uint8_t *data, PacketPtr pkt); 46
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42 uint64_t start_paddr; 43 int len; 44 bool write; 45 int bytes_completed; 46 int bytes_issued; 47 uint8_t *data; 48 PacketPtr pkt; 49}; 50 51class DMASequencer : public RubyPort 52{ 53 public: 54 typedef DMASequencerParams Params; 55 DMASequencer(const Params *); 56 void init() override; 57 58 /* external interface */ 59 RequestStatus makeRequest(PacketPtr pkt) override;
| 47 uint64_t start_paddr; 48 int len; 49 bool write; 50 int bytes_completed; 51 int bytes_issued; 52 uint8_t *data; 53 PacketPtr pkt; 54}; 55 56class DMASequencer : public RubyPort 57{ 58 public: 59 typedef DMASequencerParams Params; 60 DMASequencer(const Params *); 61 void init() override; 62 63 /* external interface */ 64 RequestStatus makeRequest(PacketPtr pkt) override;
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60 bool busy() { return m_is_busy;} 61 int outstandingCount() const override { return (m_is_busy ? 1 : 0); }
| 65 bool busy() { return m_outstanding_count > 0; } 66 int outstandingCount() const override { return m_outstanding_count; }
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62 bool isDeadlockEventScheduled() const override { return false; } 63 void descheduleDeadlockEvent() override {} 64 65 /* SLICC callback */
| 67 bool isDeadlockEventScheduled() const override { return false; } 68 void descheduleDeadlockEvent() override {} 69 70 /* SLICC callback */
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66 void dataCallback(const DataBlock & dblk); 67 void ackCallback();
| 71 void dataCallback(const DataBlock &dblk, const Addr &addr); 72 void ackCallback(const Addr &addr);
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68 69 void recordRequestType(DMASequencerRequestType requestType); 70 71 private:
| 73 74 void recordRequestType(DMASequencerRequestType requestType); 75 76 private:
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72 void issueNext();
| 77 void issueNext(const Addr &addr);
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73
| 78
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74 bool m_is_busy;
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75 uint64_t m_data_block_mask;
| 79 uint64_t m_data_block_mask;
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76 DMARequest active_request;
| 80 81 typedef std::unordered_map<Addr, DMARequest> RequestTable; 82 RequestTable m_RequestTable; 83 84 int m_outstanding_count; 85 int m_max_outstanding_requests;
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77}; 78 79#endif // __MEM_RUBY_SYSTEM_DMASEQUENCER_HH__
| 86}; 87 88#endif // __MEM_RUBY_SYSTEM_DMASEQUENCER_HH__
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