1/*
2 * Copyright (c) 2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef __MEM_RUBY_SYSTEM_DMASEQUENCER_HH__
30#define __MEM_RUBY_SYSTEM_DMASEQUENCER_HH__
31
32#include <memory>
33#include <ostream>
34#include <unordered_map>
35
36#include "mem/protocol/DMASequencerRequestType.hh"
37#include "mem/ruby/common/Address.hh"
38#include "mem/ruby/common/DataBlock.hh"
39#include "mem/ruby/system/RubyPort.hh"
40#include "params/DMASequencer.hh"
41
42struct DMARequest
43{
44 DMARequest(uint64_t start_paddr, int len, bool write, int bytes_completed,
45 int bytes_issued, uint8_t *data, PacketPtr pkt);
46
47 uint64_t start_paddr;
48 int len;
49 bool write;
50 int bytes_completed;
51 int bytes_issued;
52 uint8_t *data;
53 PacketPtr pkt;
54};
55
56class DMASequencer : public RubyPort
57{
58 public:
59 typedef DMASequencerParams Params;
60 DMASequencer(const Params *);
61 void init() override;
62
63 /* external interface */
64 RequestStatus makeRequest(PacketPtr pkt) override;
65 bool busy() { return m_outstanding_count > 0; }
66 int outstandingCount() const override { return m_outstanding_count; }
67 bool isDeadlockEventScheduled() const override { return false; }
68 void descheduleDeadlockEvent() override {}
69
70 /* SLICC callback */
71 void dataCallback(const DataBlock &dblk, const Addr &addr);
72 void ackCallback(const Addr &addr);
73
74 void recordRequestType(DMASequencerRequestType requestType);
75
76 private:
77 void issueNext(const Addr &addr);
78
79 uint64_t m_data_block_mask;
80
81 typedef std::unordered_map<Addr, DMARequest> RequestTable;
82 RequestTable m_RequestTable;
83
84 int m_outstanding_count;
85 int m_max_outstanding_requests;
86};
87
88#endif // __MEM_RUBY_SYSTEM_DMASEQUENCER_HH__