1
2#include "mem/ruby/system/DMASequencer.hh"
3#include "mem/ruby/buffers/MessageBuffer.hh"
4#include "mem/ruby/slicc_interface/AbstractController.hh"
5
6/* SLICC generated types */
7#include "mem/protocol/SequencerMsg.hh"
8#include "mem/protocol/SequencerRequestType.hh"
9#include "mem/ruby/system/System.hh"
10
11//
12// Fix me: This code needs comments!
13//
14
15DMASequencer::DMASequencer(const Params *p)
16 : RubyPort(p)
17{
18}
19
20void DMASequencer::init()
21{
22 RubyPort::init();
23 m_is_busy = false;
24 m_data_block_mask = ~ (~0 << RubySystem::getBlockSizeBits());
25}
26
27RequestStatus DMASequencer::makeRequest(const RubyRequest & request)
28{
29 uint64_t paddr = request.paddr;
30 uint8_t* data = request.data;
31 int len = request.len;
32 bool write = false;
33 switch(request.type) {
34 case RubyRequestType_LD:
35 write = false;
36 break;
37 case RubyRequestType_ST:
38 write = true;
39 break;
40 case RubyRequestType_NULL:
41 case RubyRequestType_IFETCH:
42 case RubyRequestType_Locked_Read:
43 case RubyRequestType_Locked_Write:
44 case RubyRequestType_RMW_Read:
45 case RubyRequestType_RMW_Write:
46 case RubyRequestType_NUM:
47 panic("DMASequencer::makeRequest does not support the RubyRequestType");
48 return RequestStatus_NULL;
49 }
50
51 assert(!m_is_busy); // only support one outstanding DMA request
52 m_is_busy = true;
53
54 active_request.start_paddr = paddr;
55 active_request.write = write;
56 active_request.data = data;
57 active_request.len = len;
58 active_request.bytes_completed = 0;
59 active_request.bytes_issued = 0;
60 active_request.pkt = request.pkt;
61
62 SequencerMsg msg;
63 msg.getPhysicalAddress() = Address(paddr);
64 msg.getLineAddress() = line_address(msg.getPhysicalAddress());
65 msg.getType() = write ? SequencerRequestType_ST : SequencerRequestType_LD;
66 int offset = paddr & m_data_block_mask;
67
68 msg.getLen() = (offset + len) <= RubySystem::getBlockSizeBytes() ?
69 len :
70 RubySystem::getBlockSizeBytes() - offset;
71
72 if (write) {
73 msg.getDataBlk().setData(data, offset, msg.getLen());
74 }
75
76 assert(m_mandatory_q_ptr != NULL);
77 m_mandatory_q_ptr->enqueue(msg);
78 active_request.bytes_issued += msg.getLen();
79
80 return RequestStatus_Issued;
81}
82
83void DMASequencer::issueNext()
84{
85 assert(m_is_busy == true);
86 active_request.bytes_completed = active_request.bytes_issued;
87 if (active_request.len == active_request.bytes_completed) {
88 ruby_hit_callback(active_request.pkt);
89 m_is_busy = false;
90 return;
91 }
92
93 SequencerMsg msg;
94 msg.getPhysicalAddress() = Address(active_request.start_paddr +
95 active_request.bytes_completed);
96
97 assert((msg.getPhysicalAddress().getAddress() & m_data_block_mask) == 0);
98 msg.getLineAddress() = line_address(msg.getPhysicalAddress());
99
100 msg.getType() = (active_request.write ? SequencerRequestType_ST :
101 SequencerRequestType_LD);
102
103 msg.getLen() = (active_request.len -
104 active_request.bytes_completed < RubySystem::getBlockSizeBytes() ?
105 active_request.len - active_request.bytes_completed :
106 RubySystem::getBlockSizeBytes());
107
108 if (active_request.write) {
109 msg.getDataBlk().setData(&active_request.data[active_request.bytes_completed],
110 0, msg.getLen());
111 msg.getType() = SequencerRequestType_ST;
112 } else {
113 msg.getType() = SequencerRequestType_LD;
114 }
115
116 assert(m_mandatory_q_ptr != NULL);
117 m_mandatory_q_ptr->enqueue(msg);
118 active_request.bytes_issued += msg.getLen();
119}
120
121void DMASequencer::dataCallback(const DataBlock & dblk)
122{
123 assert(m_is_busy == true);
124 int len = active_request.bytes_issued - active_request.bytes_completed;
125 int offset = 0;
126 if (active_request.bytes_completed == 0)
127 offset = active_request.start_paddr & m_data_block_mask;
128 assert( active_request.write == false );
129 memcpy(&active_request.data[active_request.bytes_completed],
130 dblk.getData(offset, len), len);
131 issueNext();
132}
133
134void DMASequencer::ackCallback()
135{
136 issueNext();
137}
138
139void DMASequencer::printConfig(ostream & out)
140{
141
142}
143
144
145DMASequencer *
146DMASequencerParams::create()
147{
148 return new DMASequencer(this);
149}