PerfectCacheMemory.hh (11020:882ce080c9f7) PerfectCacheMemory.hh (11025:4872dbdea907)
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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50
51template<class ENTRY>
52class PerfectCacheMemory
53{
54 public:
55 PerfectCacheMemory();
56
57 // tests to see if an address is present in the cache
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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50
51template<class ENTRY>
52class PerfectCacheMemory
53{
54 public:
55 PerfectCacheMemory();
56
57 // tests to see if an address is present in the cache
58 bool isTagPresent(const Address& address) const;
58 bool isTagPresent(Addr address) const;
59
60 // Returns true if there is:
61 // a) a tag match on this address or there is
62 // b) an Invalid line in the same cache "way"
59
60 // Returns true if there is:
61 // a) a tag match on this address or there is
62 // b) an Invalid line in the same cache "way"
63 bool cacheAvail(const Address& address) const;
63 bool cacheAvail(Addr address) const;
64
65 // find an Invalid entry and sets the tag appropriate for the address
64
65 // find an Invalid entry and sets the tag appropriate for the address
66 void allocate(const Address& address);
66 void allocate(Addr address);
67
67
68 void deallocate(const Address& address);
68 void deallocate(Addr address);
69
70 // Returns with the physical address of the conflicting cache line
69
70 // Returns with the physical address of the conflicting cache line
71 Address cacheProbe(const Address& newAddress) const;
71 Addr cacheProbe(Addr newAddress) const;
72
73 // looks an address up in the cache
72
73 // looks an address up in the cache
74 ENTRY* lookup(const Address& address);
75 const ENTRY* lookup(const Address& address) const;
74 ENTRY* lookup(Addr address);
75 const ENTRY* lookup(Addr address) const;
76
77 // Get/Set permission of cache block
76
77 // Get/Set permission of cache block
78 AccessPermission getPermission(const Address& address) const;
79 void changePermission(const Address& address, AccessPermission new_perm);
78 AccessPermission getPermission(Addr address) const;
79 void changePermission(Addr address, AccessPermission new_perm);
80
81 // Print cache contents
82 void print(std::ostream& out) const;
83
84 private:
85 // Private copy constructor and assignment operator
86 PerfectCacheMemory(const PerfectCacheMemory& obj);
87 PerfectCacheMemory& operator=(const PerfectCacheMemory& obj);
88
89 // Data Members (m_prefix)
80
81 // Print cache contents
82 void print(std::ostream& out) const;
83
84 private:
85 // Private copy constructor and assignment operator
86 PerfectCacheMemory(const PerfectCacheMemory& obj);
87 PerfectCacheMemory& operator=(const PerfectCacheMemory& obj);
88
89 // Data Members (m_prefix)
90 m5::hash_map<Address, PerfectCacheLineState<ENTRY> > m_map;
90 m5::hash_map > m_map;
91};
92
93template<class ENTRY>
94inline std::ostream&
95operator<<(std::ostream& out, const PerfectCacheMemory<ENTRY>& obj)
96{
97 obj.print(out);
98 out << std::flush;

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103inline
104PerfectCacheMemory<ENTRY>::PerfectCacheMemory()
105{
106}
107
108// tests to see if an address is present in the cache
109template<class ENTRY>
110inline bool
91};
92
93template<class ENTRY>
94inline std::ostream&
95operator<<(std::ostream& out, const PerfectCacheMemory<ENTRY>& obj)
96{
97 obj.print(out);
98 out << std::flush;

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103inline
104PerfectCacheMemory<ENTRY>::PerfectCacheMemory()
105{
106}
107
108// tests to see if an address is present in the cache
109template<class ENTRY>
110inline bool
111PerfectCacheMemory<ENTRY>::isTagPresent(const Address& address) const
111PerfectCacheMemory<ENTRY>::isTagPresent(Addr address) const
112{
112{
113 return m_map.count(line_address(address)) > 0;
113 return m_map.count(makeLineAddress(address)) > 0;
114}
115
116template<class ENTRY>
117inline bool
114}
115
116template<class ENTRY>
117inline bool
118PerfectCacheMemory<ENTRY>::cacheAvail(const Address& address) const
118PerfectCacheMemory<ENTRY>::cacheAvail(Addr address) const
119{
120 return true;
121}
122
123// find an Invalid or already allocated entry and sets the tag
124// appropriate for the address
125template<class ENTRY>
126inline void
119{
120 return true;
121}
122
123// find an Invalid or already allocated entry and sets the tag
124// appropriate for the address
125template<class ENTRY>
126inline void
127PerfectCacheMemory<ENTRY>::allocate(const Address& address)
127PerfectCacheMemory<ENTRY>::allocate(Addr address)
128{
129 PerfectCacheLineState<ENTRY> line_state;
130 line_state.m_permission = AccessPermission_Invalid;
131 line_state.m_entry = ENTRY();
128{
129 PerfectCacheLineState<ENTRY> line_state;
130 line_state.m_permission = AccessPermission_Invalid;
131 line_state.m_entry = ENTRY();
132 m_map[line_address(address)] = line_state;
132 m_map[makeLineAddress(address)] = line_state;
133}
134
135// deallocate entry
136template<class ENTRY>
137inline void
133}
134
135// deallocate entry
136template<class ENTRY>
137inline void
138PerfectCacheMemory<ENTRY>::deallocate(const Address& address)
138PerfectCacheMemory<ENTRY>::deallocate(Addr address)
139{
139{
140 m_map.erase(line_address(address));
140 m_map.erase(makeLineAddress(address));
141}
142
143// Returns with the physical address of the conflicting cache line
144template<class ENTRY>
141}
142
143// Returns with the physical address of the conflicting cache line
144template<class ENTRY>
145inline Address
146PerfectCacheMemory<ENTRY>::cacheProbe(const Address& newAddress) const
145inline Addr
146PerfectCacheMemory<ENTRY>::cacheProbe(Addr newAddress) const
147{
148 panic("cacheProbe called in perfect cache");
149 return newAddress;
150}
151
152// looks an address up in the cache
153template<class ENTRY>
154inline ENTRY*
147{
148 panic("cacheProbe called in perfect cache");
149 return newAddress;
150}
151
152// looks an address up in the cache
153template<class ENTRY>
154inline ENTRY*
155PerfectCacheMemory<ENTRY>::lookup(const Address& address)
155PerfectCacheMemory<ENTRY>::lookup(Addr address)
156{
156{
157 return &m_map[line_address(address)].m_entry;
157 return &m_map[makeLineAddress(address)].m_entry;
158}
159
160// looks an address up in the cache
161template<class ENTRY>
162inline const ENTRY*
158}
159
160// looks an address up in the cache
161template<class ENTRY>
162inline const ENTRY*
163PerfectCacheMemory<ENTRY>::lookup(const Address& address) const
163PerfectCacheMemory<ENTRY>::lookup(Addr address) const
164{
164{
165 return &m_map[line_address(address)].m_entry;
165 return &m_map[makeLineAddress(address)].m_entry;
166}
167
168template<class ENTRY>
169inline AccessPermission
166}
167
168template<class ENTRY>
169inline AccessPermission
170PerfectCacheMemory<ENTRY>::getPermission(const Address& address) const
170PerfectCacheMemory<ENTRY>::getPermission(Addr address) const
171{
171{
172 return m_map[line_address(address)].m_permission;
172 return m_map[makeLineAddress(address)].m_permission;
173}
174
175template<class ENTRY>
176inline void
173}
174
175template<class ENTRY>
176inline void
177PerfectCacheMemory<ENTRY>::changePermission(const Address& address,
177PerfectCacheMemory<ENTRY>::changePermission(Addr address,
178 AccessPermission new_perm)
179{
178 AccessPermission new_perm)
179{
180 Address line_address = address;
181 line_address.makeLineAddress();
180 Addr line_address = makeLineAddress(address);
182 PerfectCacheLineState<ENTRY>& line_state = m_map[line_address];
183 line_state.m_permission = new_perm;
184}
185
186template<class ENTRY>
187inline void
188PerfectCacheMemory<ENTRY>::print(std::ostream& out) const
189{
190}
191
192#endif // __MEM_RUBY_STRUCTURES_PERFECTCACHEMEMORY_HH__
181 PerfectCacheLineState<ENTRY>& line_state = m_map[line_address];
182 line_state.m_permission = new_perm;
183}
184
185template<class ENTRY>
186inline void
187PerfectCacheMemory<ENTRY>::print(std::ostream& out) const
188{
189}
190
191#endif // __MEM_RUBY_STRUCTURES_PERFECTCACHEMEMORY_HH__