CacheMemory.hh (11059:40e622551656) CacheMemory.hh (11061:25b53a7195f7)
1/*
2 * Copyright (c) 1999-2012 Mark D. Hill and David A. Wood
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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93
94 // looks an address up in the cache
95 AbstractCacheEntry* lookup(Addr address);
96 const AbstractCacheEntry* lookup(Addr address) const;
97
98 Cycles getTagLatency() const { return tagArray.getLatency(); }
99 Cycles getDataLatency() const { return dataArray.getLatency(); }
100
1/*
2 * Copyright (c) 1999-2012 Mark D. Hill and David A. Wood
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

--- 84 unchanged lines hidden (view full) ---

93
94 // looks an address up in the cache
95 AbstractCacheEntry* lookup(Addr address);
96 const AbstractCacheEntry* lookup(Addr address) const;
97
98 Cycles getTagLatency() const { return tagArray.getLatency(); }
99 Cycles getDataLatency() const { return dataArray.getLatency(); }
100
101 bool isBlockInvalid(int64 cache_set, int64 loc);
102 bool isBlockNotBusy(int64 cache_set, int64 loc);
101 bool isBlockInvalid(int64_t cache_set, int64_t loc);
102 bool isBlockNotBusy(int64_t cache_set, int64_t loc);
103
104 // Hook for checkpointing the contents of the cache
105 void recordCacheContents(int cntrl, CacheRecorder* tr) const;
106
107 // Set this address to most recently used
108 void setMRU(Addr address);
109
110 // Functions for locking and unlocking cache lines corresponding to the

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144 Stats::Scalar numDataArrayStalls;
145
146 int getCacheSize() const { return m_cache_size; }
147 int getNumBlocks() const { return m_cache_num_sets * m_cache_assoc; }
148 Addr getAddressAtIdx(int idx) const;
149
150 private:
151 // convert a Address to its location in the cache
103
104 // Hook for checkpointing the contents of the cache
105 void recordCacheContents(int cntrl, CacheRecorder* tr) const;
106
107 // Set this address to most recently used
108 void setMRU(Addr address);
109
110 // Functions for locking and unlocking cache lines corresponding to the

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144 Stats::Scalar numDataArrayStalls;
145
146 int getCacheSize() const { return m_cache_size; }
147 int getNumBlocks() const { return m_cache_num_sets * m_cache_assoc; }
148 Addr getAddressAtIdx(int idx) const;
149
150 private:
151 // convert a Address to its location in the cache
152 int64 addressToCacheSet(Addr address) const;
152 int64_t addressToCacheSet(Addr address) const;
153
154 // Given a cache tag: returns the index of the tag in a set.
155 // returns -1 if the tag is not found.
153
154 // Given a cache tag: returns the index of the tag in a set.
155 // returns -1 if the tag is not found.
156 int findTagInSet(int64 line, Addr tag) const;
157 int findTagInSetIgnorePermissions(int64 cacheSet, Addr tag) const;
156 int findTagInSet(int64_t line, Addr tag) const;
157 int findTagInSetIgnorePermissions(int64_t cacheSet, Addr tag) const;
158
159 // Private copy constructor and assignment operator
160 CacheMemory(const CacheMemory& obj);
161 CacheMemory& operator=(const CacheMemory& obj);
162
163 private:
164 // Data Members (m_prefix)
165 bool m_is_instruction_only_cache;

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159 // Private copy constructor and assignment operator
160 CacheMemory(const CacheMemory& obj);
161 CacheMemory& operator=(const CacheMemory& obj);
162
163 private:
164 // Data Members (m_prefix)
165 bool m_is_instruction_only_cache;

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